CMX994 Datasheet, PDF (17/61 Pages) CML Microcircuits – Local Oscillator

Direct Conversion Receivers
CMX994/CMX994A/CMX994E
6 General Description
The architecture of the CMX994/CMX994A/CMX994E devices is shown in Figure 1. The
CMX994/CMX994A/CMX994E are receiver ICs featuring very high IIP2 I/Q demodulators intended for use as a
direct conversion receiver to zero IF, near-zero IF and low IF. The device has flexible LO inputs, integer-N PLL
and an on-chip negative resistance amplifier which, with the addition of suitable external components,
provides a VCO.
The receiver is fully integrated with a Low Noise Amplifier (LNA) preceding the down-converter section. The
LNA may be configured with one of two possible output impedance settings (100 or 50). With the 50
mode selected, there is more gain available but the circuit will consume an additional 2mA of current. The
50 mode has primarily been included for use at frequencies of 450MHz or higher. It should be noted that as
the output impedance is not the same for each setting, the required matching components between the LNA
and mixer will be different for each case.
The high-linearity down-converting mixers are immediately followed by a baseband filter stage. The
bandwidth of this section is set by external capacitors. This first stage of filtering is designed to remove off-
channel blocking signals prior to baseband amplification. Following these filters, gain is applied via a variable
gain amplifier. Further filtering is then applied and again the bandwidth of the filters is determined by
external capacitors. A reference resistor must also be fitted; this is used to calibrate the internal filter circuits
to ensure the cut-off point of the filters is accurately controlled. This system allows effective correction for
the analogue response to be applied in signal processing following the CMX994/CMX994A/CMX994E. The
output of the CMX994/CMX994A/CMX994E is differential I/Q signals; these may be applied to analogue-to-
digital converters such as those in the CMX983, CMX910, CMX7163 or the CMX7164 ICs.
The receiver I/Q chain includes the facility to correct for inherent dc offsets in the hardware. This process is
intended to optimise the dynamic range of the system and must be controlled by the microprocessor or DSP
that processes the I/Q signals from the CMX994/CMX994A/CMX994E. DC offsets are a well-known issue with
direct conversion receivers. In dynamic signal environments dc offset removal algorithms will be required to
track and remove dc offsets generated by off-channel signals. Very high I/Q mixer IIP2 performance
minimises such offsets. The receiver sections have a low power mode that reduces current. This mode may
be used when reduced intermodulation performance is acceptable.
The Local Oscillator section features an integer-N Phase Locked Loop (PLL). This may be used with the on-chip
VCO or with an external VCO. The on-chip VCO consists of a negative resistance amplifier and buffers, which
allows an external inductor together with external varactor diodes to determine the operating frequency and
tuning range. The use of external components allows optimum phase noise to be achieved. The Rx LO signal
may be divided by 2, 4 or 6. There is also a Tx LO output provided and the Tx LO signal may be divided by 1,
2, 4 or 6. Alternatively the on-chip PLL and VCO can be disabled and an external LO source supplied.
All features of the CMX994/CMX994A/CMX994E may be controlled by the C-BUS control interface.
The following sections describe specific features of the CMX994/CMX994A/CMX994E.
 2015 CML Microsystems Plc
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