CMX994 Datasheet, PDF (26/61 Pages) CML Microcircuits – Local Oscillator

Direct Conversion Receivers
CMX994/CMX994A/CMX994E
7.2
7.2.1
General Control Register
General Control: $11 - 8-bit write only
This register controls general features such as powersave. All bits of this register are cleared to ‘0’ by a
General Reset command.
7
En Bias
6
Freq2
5
Freq1
4
3
2
1
LP
VCOEN PLLEN
RXEN
0
TXEN
b7 and 4-0:
These bits control power up/power down of the various blocks of the IC. In all cases ‘1’ = power up,
‘0’ = power down.
b7
Enables BIAS generator
b4
Enables low power mode. When b4 = ‘0’ the device is operating normally, when b4= ‘1’ the device
will have reduced power consumption and reduced intermodulation performance. See also section
8.1.5 regarding other CMX994A/CMX994E low power modes.
b3
Enables VCO: When b3 =’1’ the setting of the VCO Control Register ($25) takes effect. For details of
VCO Control Register see section 7.11.
b2
PLL Enable: This bit enables the PLL and is ANDed with PLL M-Divider Register ($21) b7 – section
7.9.1 See also section 6.3.2.
b1
C-BUS Rx Enable; see section 6.1.1
b0
C-BUS Tx Enable; see section 6.1.1
b6, b5
These bits optimise the amplitude of the local oscillator path within the device in order to maintain
phase balance and noise performance of the receiver mixers over the full range of operating
frequencies.
b6
b5
Operation
0
0
100MHz – 150MHz
0
1
150MHz – 300MHz
1
0
300MHz – 700MHz
700MHz – 1000MHz
1
1
(700MHz - 940MHz for
CMX994)
7.2.2 General Control: $E1 - 8-bit read only
This register reads the value in register $11; see section 7.2.1 for details of bit functions.
 2015 CML Microsystems Plc
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