FX929A Datasheet, PDF(18/44 Page) CML Microcircuits

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FX929A Datasheet, PDF (18/44 Pages) CML Microcircuits – 4-Level FSK Modem Data Pump

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4-Level FSK Modem Data Pump

FX929A

As each of the 3 'S' symbols of the block is received, the SVAL bits of the Status Register will be updated and

the SRDY bit set to '1'. (If the SSIEN bit of the Mode Register is '1', then the Status Register IRQ bit will also be

set to '1'.) Note that when the third 'S' symbol is received, the SRDY bit will be set to '1' coincidentally with the

BFREE bit also being set to '1'.

SFS: Search for Frame Sync

This task - which is intended for special test and channel monitoring purposes - performs the first two parts only

of a SFP task. It causes the modem to search the received signal for a 24-symbol sequence which matches the

required Frame Synchronisation pattern to within the tolerance defined by the FSTOL bits of the Mode

When a match is found the modem will read in the following 'S' symbol, then set the BFREE, IRQ and SRDY

bits of the Status Register to '1' and update the SVAL bits. The ÂµC may then write the next task to the

Command Register.

R4S: Read 4 Symbols

This task causes the modem to read the next 4 symbols and translate them directly (without de-interleaving or

FEC) to an 8-bit byte which is placed into the Data Block Buffer. The BFREE and IRQ bits of the Status

write the next task to the Command Register.

This task is intended for special tests and channel monitoring - perhaps preceded by SFS task

RSID: Read Station ID

This task causes the modem to read in and decode the following 23 symbols as Station ID data followed by an

'S' symbol. It is similar to the last two parts of a SFP task except that it will not re-start if the received CRC0 is

incorrect. It would normally follow a SFS task.

The 3 decoded bytes will be placed into the Data Block Buffer, and the CRCERR bit of the Status Register set

to '1' if the received CRC0 was incorrect, otherwise it will be cleared to '0'. The SVAL bits of the Status Register

will be updated and the BFREE, SRDY and IRQ bits set to '1' to indicate that the ÂµC may read the 3 received

bytes from the Data Block Buffer and write the next task to the modem's Command Register.

T24S: Transmit 24 Symbols

This task, which is intended to facilitate the transmission of Symbol and Frame Sync patterns as well as special

test sequences, takes 6 bytes of data from the Data Block Buffer and transmits them as 24 4-level symbols

without any CRC, FEC, interleaving or adding any 'S' symbols.

Byte 0 of the Data Block Buffer is sent first, byte 5 last.

Once the modem has read the data bytes from the Data Block Buffer, the BFREE and IRQ bits of the Status

the modem.

The tables below show what data has to be written to the Data Block Buffer to transmit the FX929A Symbol and

Frame Sync sequences:

D/929A/4

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