CS4350_07 Datasheet, PDF (7/41 Pages) Cirrus Logic – 192 kHz Stereo DAC with Integrated PLL

CS4350
RST
Reset (Input) - When pulled low, device will power down and reset all internal registers to their default
24 _settings.
Control Port Definitions
AD1/CDOUT
1
Address Bit 1 / Serial Control Data Out (I/O) - Chip address bit 1 in I²C Mode or data output in SPI
Mode
AD0/CS
2 Address Bit 0 / Chip Select (Input) - Chip address bit 0 in I²C Mode or Chip Select in SPI Mode
SDA/CDIN
3 Serial Control Data In (I/O) - Input/Output for I²C data. Input for SPI data
SCL/CCLK
4 ^{Serial Control Port Clock (Input) - Serial clock for the control port interface}
Stand-Alone Definitions
DIF0
DIF1
DIF2
Digital Interface Format (Input) - Defines the required relationship between the Left Right Clock, Serial
1, 3, 4 _{Clock, and Serial Audio Data}
DEM
De-emphasis (Input) - Selects the standard 15 μs/50 μs digital de-emphasis filter response for
2 _{44.1 kHz sample rates}
DS691F1
7