CS4350_07 Datasheet, PDF (5/41 Pages) Cirrus Logic – 192 kHz Stereo DAC with Integrated PLL

CS4350
LIST OF FIGURES
Figure 1. Equivalent Output Load .............................................................................................................. 11
Figure 2. Maximum Loading....................................................................................................................... 11
Figure 3. THD+N vs Output Amplitude for VA = 5.0 V ............................................................................... 11
Figure 4. THD+N vs Output Amplitude for VA = 3.3 V ............................................................................... 11
Figure 5. THD+N vs Output Amplitude for VA = 3.14 V ............................................................................. 11
Figure 6. Serial Port Timing, Non-TDM Mode............................................................................................ 14
Figure 7. Serial Port Timing, TDM Mode.................................................................................................... 14
Figure 8. Control Port Timing - I²C Format................................................................................................. 14
Figure 9. Control Port Timing - SPI Mode .................................................................................................. 15
Figure 10. Typical Connection Diagram..................................................................................................... 17
Figure 11. Left-Justified up to 24-Bit Data.................................................................................................. 19
Figure 12. I²S, up to 24-Bit Data ................................................................................................................ 19
Figure 13. Right-Justified Data................................................................................................................... 19
Figure 14. TDM Mode Connection Diagram .............................................................................................. 20
Figure 15. TDM Mode Timing .................................................................................................................... 20
Figure 16. De-Emphasis Curve.................................................................................................................. 21
Figure 17. Differential to Single-Ended Output Filter ................................................................................. 23
Figure 18. Passive Single-Ended Output Filter .......................................................................................... 23
Figure 19. Control Port Timing, I²C Mode .................................................................................................. 26
Figure 20. Control Port Timing, SPI Mode ................................................................................................. 27
Figure 21. De-Emphasis Curve.................................................................................................................. 30
Figure 22. ATAPI Block Diagram ............................................................................................................... 31
Figure 23. Stopband Rejection (fast), all Modes ........................................................................................ 36
Figure 24. Stopband Rejection (slow), all Modes....................................................................................... 36
Figure 25. Single-Speed (fast) Passband Detail ........................................................................................ 36
Figure 26. Single-Speed (slow) Passband Detail....................................................................................... 36
Figure 27. Double-Speed (fast) Passband Detail....................................................................................... 36
Figure 28. Double-Speed (slow) Passband Detail ..................................................................................... 36
Figure 29. Quad-Speed (fast) Passband Detail ......................................................................................... 37
Figure 30. Quad-Speed (slow) Passband Detail........................................................................................ 37
LIST OF TABLES
Table 1. CS4350 Auto-Detect .................................................................................................................... 18
Table 2. Digital Interface Format - Stand-Alone Mode............................................................................... 24
Table 3. Digital Interface Formats .............................................................................................................. 29
Table 4. ATAPI Decode ............................................................................................................................. 31
Table 5. Example Digital Volume Settings ................................................................................................. 33
DS691F1
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