CS4350_07 Datasheet, PDF (23/41 Pages) Cirrus Logic – 192 kHz Stereo DAC with Integrated PLL

CS4350
4.8 Analog Output and Filtering
The Cirrus Application Note titled Design Notes for a 2-Pole Filter with Differential Input, available as AN48
at www.cirrus.com, discusses the second-order Butterworth filter and differential-to-single-ended converter
that was implemented on the CS4350 evaluation board, CDB4350. Figure 17 illustrates this
implementation. If only single-ended outputs from the CS4350 are required, the passive output filter shown
in Figure 18 can be used.
CS4350
5600 pF
C0G
4.02 kΩ
1000 pF
AOUTx -
4.64 kΩ
392 Ω
C0G
-
22 μF 562 Ω
AOUTx +
1.62 kΩ 221 Ω
+
2700 pF
47 kΩ
GND
.015 μF
C0G
1.37 kΩ
C0G
22 μF
* See section 4.9 for ground connection details
Figure 17. Differential to Single-Ended Output Filter
Analog
Output
CS4350
AOUTx +
3.3 µF
+
560 Ω
10 kΩ
2200 pF
Analog
Output
GND
* See section 4.9 for ground connection details
Figure 18. Passive Single-Ended Output Filter
4.9 Grounding and Power Supply Arrangements
As with any high-resolution converter, the CS4350 requires careful attention to power supply and grounding
arrangements if its potential performance is to be realized. Figure 10 shows the recommended power ar-
rangements, with VA, VLC, and VLS connected to clean supplies. The use of split analog and digital ground
planes is not recommended. However, if planes are split between digital ground and analog ground the
GND pins of the CS4350 should be connected to the analog ground plane.
All signals, especially clocks, should be kept away from the VBIAS, VFILT, and VQ pins in order to avoid
unwanted coupling into the DAC.
4.9.1
Capacitor Placement
Decoupling capacitors should be placed as close to the DAC as possible, with the low value ceramic ca-
pacitor being the closest. To further minimize impedance, these capacitors should be located on the same
layer as the DAC. If desired, all supply pins may be connected to the same supply, but a decoupling ca-
pacitor should still be placed on each supply pin.
Note: All decoupling capacitors should be referenced to GND.
The CDB4350 evaluation board demonstrates the optimum layout and power supply arrangements.
DS691F1
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