CS4350_07 Datasheet, PDF (32/41 Pages) Cirrus Logic – 192 kHz Stereo DAC with Integrated PLL

CS4350
ATAPI_A1 ATAPI_A0 ATAPI_B1 ATAPI_B0
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
AOUTA
aL
aL
aL
aL
a[(L+R)/2]
a[(L+R)/2]
a[(L+R)/2]
a[(L+R)/2]
Table 4. ATAPI Decode
AOUTB
MUTE
bR
bL
b[(L+R)/2]
MUTE
bR
bL
b[(L+R)/2]
8.4 Mute Control - Register 04h
7
AMUTE
1
6
Reserved
0
5
MUTEC A=B
0
4
MUTE_A
0
3
MUTE_B
0
2
Reserved
0
1
Reserved
0
0
Reserved
0
8.4.1
Auto-Mute (AMUTE) Bit 7
Function:
When set to 1 (default), the Digital-to-Analog converter output will mute following the reception of 8192
consecutive audio samples of static 0 or -1. A single sample of non-static data will release the mute. De-
tection and muting is done independently for each channel. The quiescent voltage on the output will be
retained and the Mute Control pin will go active during the mute period.
When set to 0, this function is disabled
8.4.2
AMUTEC = BMUTEC (MUTEC A=B) Bit 5
Function:
When set to 0 (default), the AMUTEC and BMUTEC pins operate independently.
When set to 1, the individual controls for AMUTEC and BMUTEC are internally connected through an
AND gate prior to the output pins. Therefore, the external AMUTEC and BMUTEC pins go active only
when the requirements for both AMUTEC and BMUTEC are valid.
8.4.3
Channel A Mute (MUTE_A) Bit 4 & Channel B Mute (MUTE_B) Bit 3
Function:
When set to 1, the Digital-to-Analog converter output will mute. The quiescent voltage on the output will
be retained. The muting function is effected, similar to attenuation changes, by the Soft and Zero Cross
bits in the Volume and Mixing Control register. The corresponding MUTEC pin will go active following any
ramping due to the soft and zero cross function.
When set to 0 (default), this function is disabled.
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DS691F1