EP7312 Datasheet, PDF (57/64 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE

DS508PP5
EP7312
High-Performance, Low-Power System on Chip
Table 23. JTAG Boundary Scan Signal Ordering (Continued)
LQFP TFBGA PBGA
Pin No. Ball
Ball
Signal
Type Position
111
T19
N16
112
T20
L12
113
R19
N15
114
R20
L13
115
T18
M16
117
P19
M15
118
P20
K11
119
R18
L16
120
N19
K12
121
N20
L15
122
P18
K13
126
M19
J10
127
N18
J16
128
L20
J11
129
L19
J15
130
M18
J12
131
K20
H16
132
K19
J13
133
K18
H15
134
J20
H13
135
J19
G16
136
H20
H12
137
H19
G15
138
J18
H11
141
G20
F15
142
H18
H10
143
F20
E16
144
G19
G13
145
E20
E15
146
F19
G12
147
G18
D16
148
D20
G11
150
F18
D15
151
D19
F13
152
E19
C16
153
C19
F12
154
C20
C15
155
E18
E13
D[23]
A[22]/DRA[5]
D[22]
A[21]/DRA[6]
D[21]
A[20]/DRA[7]
D[20]
A[19]/DRA[8]
D[19]
A[18]/DRA[9]
D[18]
A[17]/DRA[10]
D[17]
A[16]/DRA[11]
D[16]
A[15]/DRA[12]
D[15]
A[14]/DRA[13]
D[14]
A[13]/DRA[14]
D[13]
A[12]
D[12]
A[11]
D[11]
A[10]
D[10]
A[9]
D[9]
A[8]
D[8]
A[7]
D[7]
nBATCHG
nEXTPWR
BATOK
nPOR
nMEDCHG/nBROM
I/O
196
O
199
I/O
201
O
204
I/O
206
O
209
I/O
211
O
214
I/O
216
O
219
I/O
221
O
224
I/O
226
O
229
I/O
231
O
234
I/O
236
O
239
I/O
241
O
244
I/O
246
O
249
I/O
251
O
254
I/O
256
O
259
I/O
261
O
264
I/O
266
O
269
I/O
271
O
274
I/O
276
I
279
I
280
I
281
I
282
I
283
©Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
57