EP7312 Datasheet, PDF (34/64 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE

EP7312
High-Performance, Low-Power System on Chip
Table 20. 208-Pin LQFP Numeric Pin Listing (Continued)
Pin
No.
Signal
79
SMPCLK
80
FB[1]
81
VSSIO
82
FB[0]
83
COL[7]
84
COL[6]
85
COL[5]
86
COL[4]
87
COL[3]
88
COL[2]
89
VDDIO
90
TCLK
91
COL[1]
92
COL[0]
93
BUZ
94
D[31]
95
D[30]
96
D[29]
97
D[28]
98
VSSIO
99
A[27]/DRA[0]
100
D[27]
101
A[26]/DRA[1]
102
D[26]
103
A[25]/DRA[2]
104
D[25]
105
HALFWORD
106
A[24]/DRA[3]
107
VDDIO
108
VSSIO
109
D[24]
110
A[23]/DRA[4]
111
D[23]
112
A[22]/DRA[5]
113
D[22]
114
A[21]/DRA[6]
115
D[21]
116
VSSIO
117
A[20]/DRA[7]
Strength^†
1
Reset
State
Low
1
High
1
High
1
High
1
High
1
High
1
High
1
High
1
High
1
Low
1
Low
1
Low
1
Low
1
Low
2
Low
1
Low
2
Low
1
Low
2
Low
1
Low
1
Low
1
Low
—
—
1
Low
1
Low
1
Low
1
Low
1
Low
1
Low
1
Low
1
Low
Type
O
I
Pad Gnd
I
O
O
O
O
O
O
Pad Pwr
I
O
O
O
I/O
I/O
I/O
I/O
Pad Gnd
O
I/O
O
I/O
O
I/O
O
O
Pad Pwr
Pad Gnd
I/O
O
I/O
O
I/O
O
I/O
Pad Gnd
O
Description
SSI1 ADC sample clock
PWM feedback input
I/O ground
PWM feedback input
Keyboard scanner column
drive
Keyboard scanner column
drive
Keyboard scanner column
drive
Keyboard scanner column
drive
Keyboard scanner column
drive
Keyboard scanner column
drive
Digital I/O power, 3.3 V
JTAG clock
Keyboard scanner column
drive
Keyboard scanner column
drive
Buzzer drive output
Data I/O
Data I/O
Data I/O
Data I/O
I/O ground
System byte address /
SDRAM address
Data I/O
System byte address /
SDRAM address
Data I/O
System byte address /
SDRAM address
Data I/O
Halfword access select output
System byte address /
SDRAM address
Digital I/O power, 3.3 V
I/O ground
Data I/O
System byte address /
SDRAM address
Data I/O
System byte address /
SDRAM address
Data I/O
System byte address /
SDRAM address
Data I/O
I/O ground
System byte address /
SDRAM address
34
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(All Rights Reserved)
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