EP7312 Datasheet, PDF (32/64 Pages) Cirrus Logic – HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE

EP7312
High-Performance, Low-Power System on Chip
208-Pin LQFP Numeric Pin Listing
Table 20. 208-Pin LQFP Numeric Pin Listing
Pin
No.
Signal
1
nCS[5]
2
VDDIO
3
VSSIO
4
EXPCLK
5
WORD
6
WRITE/nSDRAS
7
RUN/CLKEN
8
EXPRDY
9
TXD[2]
10
RXD[2]
11
TDI
12
VSSIO
13
PB[7]
14
PB[6]
15
PB[5]
16
PB[4]
17
PB[3]
18
PB[2]
19
PB[1]
20
PB[0]
21
VDDIO
22
TDO
23
PA[7]
24
PA[6]
25
PA[5]
26
PA[4]
27
PA[3]
28
PA[2]
29
PA[1]
30
PA[0]
31
LEDDRV
32
TXD[1]
33
VSSIO
34
PHDIN
35
CTS
36
RXD[1]
37
DCD
Strength^†
1
1
1
1
1
1
1
with p/u*
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Reset
State
Low
Low
Low
Low
High
Input^‡
Input^‡
Input^‡
Input^‡
Input^‡
Input^‡
Input^‡
Input^‡
Input^‡
Input^‡
Input^‡
Input^‡
Input^‡
Input^‡
Input^‡
Input^‡
Input^‡
Low
High
High
Type
O
Pad Pwr
Pad Gnd
I
O
O
O
I
O
I
I
Pad Gnd
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Pad Pwr
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
Pad Gnd
I
I
I
I
Description
Chip select 5
Digital I/O power, 3.3 V
I/O ground
Expansion clock input
Word access select output
Transfer direction / SDRAM
RAS signal output
Run output / clock enable
output
Expansion port ready input
UART 2 transmit data output
UART 2 receive data input
JTAG data input
I/O ground
GPIO port B
GPIO port B
GPIO port B
GPIO port B
GPIO port B
GPIO port B
GPIO port B
GPIO port B
Digital I/O power, 3.3 V
JTAG data out
GPIO port A
GPIO port A
GPIO port A
GPIO port A
GPIO port A
GPIO port A
GPIO port A
GPIO port A
IR LED drive
UART 1 transmit data out
I/O ground
Photodiode input
UART 1 clear to send input
UART 1 receive data input
UART 1 data carrier detect
32
©Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
DS508PP5