EP7309 Datasheet, PDF (5/46 Pages) Cirrus Logic – HIGH PERFORMANCE LOW POWER SYSTEM ON CHIP ENHANCED DIGITAL AUDIO INTERFACE

EP7309
High-Performance, Low-Power System on Chip
Synchronous Serial Interface
• ADC (SSI) Interface: Master mode only; SPI and
Microwire1-compatible (128 kbps operation)
• Selectable serial clock polarity
Pin Mnemonic
I/O
Pin Description
ADCLK
ADCIN
ADCOUT
nADCCS
SMPCLK
O
SSI1 ADC serial clock
I
SSI1 ADC serial input
O
SSI1 ADC serial output
O
SSI1 ADC chip select
O
SSI1 ADC sample clock
Table G. Serial Interface Pin Assignments
LCD Controller
A DMA address generator is provided that fetches video
display data for the LCD controller from memory. The
display frame buffer start address is programmable,
allowing the LCD frame buffer to be in SDRAM, internal
SRAM or external SRAM.
• Interfaces directly to a single-scan panel monochrome
STN LCD
• Interfaces to a single-scan panel color STN LCD with
minimal external glue logic
• Panel width size is programmable from 32 to 1024
pixels in 16-pixel increments
• Video frame buffer size programmable up to
128 KB
• Bits per pixel of 1, 2, or 4 bits
Pin Mnemonic
I/O
Pin Description
CL1
CL2
DD[3:0]
FRM
M
O
LCD line clock
O
LCD pixel clock out
O
LCD serial display data bus
O
LCD frame synchronization pulse
O
LCD AC bias drive
Table H. LCD Interface Pin Assignments
• Column outputs can be individually set high with the
remaining bits left at high-impedance
• Column outputs can be driven all-low, all-high, or all-
high-impedance
• Keyboard interrupt driven by OR'ing together all Port
A bits
• Keyboard interrupt can be used to wake up the
system
• 8×8 keyboard matrix usable with no external logic,
extra keys can be added with minimal glue logic
Pin Mnemonic
I/O
Pin Description
COL[7:0]
O
Keyboard scanner column drive
Table I. Keypad Interface Pin Assignments
Interrupt Controller
When unexpected events arise during the execution of a
program (i.e., interrupt or memory fault) an exception is
usually generated. When these exceptions occur at the
same time, a fixed priority system determines the order
in which they are handled. The EP7309 interrupt
controller has two interrupt types: interrupt request
(IRQ) and fast interrupt request (FIQ). The interrupt
controller has the ability to control interrupts from 22
different FIQ and IRQ sources.
• Supports 22 interrupts from a variety of sources (such
as UARTs, SSI1, and key matrix.)
• Routes interrupt sources to the ARM720T’s IRQ or
FIQ (Fast IRQ) inputs
• Five dedicated off-chip interrupt lines operate as level
sensitive interrupts
.
Pin Mnemonic
I/O
Pin Description
nEINT[2:1]
EINT[3]
nEXTFIQ
nMEDCHG/nBROM
(Note)
I External interrupt
I External interrupt
I External Fast Interrupt input
I Media change interrupt input
Table J. Interrupt Controller Pin Assignments
64-Keypad Interface
Matrix keyboards and keypads can be easily read by the
EP7309. A dedicated 8-bit column driver output
generates strobes for each keyboard column signal. The
pins of Port A, when configured as inputs, can be
selectively OR'ed together to provide a keyboard
interrupt that is capable of waking the system from a
STANDBY or IDLE state.
Note: Pins are multiplexed. See Table R on page 7 for more
information.
Real-Time Clock
The EP7309 contains a 32-bit Real Time Clock (RTC) that
can be written to and read from in the same manner as
the timer counters. It also contains a 32-bit output match
register which can be programmed to generate an
interrupt.
DS507PP1
Copyright 2001 Cirrus Logic (All Rights Reserved)
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