EP7309 Datasheet, PDF (19/46 Pages) Cirrus Logic – HIGH PERFORMANCE LOW POWER SYSTEM ON CHIP ENHANCED DIGITAL AUDIO INTERFACE

LCD Interface
Parameter
CL[1] falling to CL[2] falling time
LCD CL[2] low time
LCD CL[2] high time
CL[2] falling to CL[1] rising delay time
CL[1] falling to CL[2] rising delay time
LCD CL[1] high time
CL[1] falling to FRM transition time
CL[1] falling to M transition time
CL[2] rising to DD (display data) transition time
EP7309
High-Performance, Low-Power System on Chip
Symbol
t_clk
t_{clk_low}
t_{clk_high}
t_CL1d
t_CL2d
t_CL2h
t_FRMd
t_Md
t_DDd
Min
Max
Unit
200
6,950
ns
80
3,475
ns
80
3,475
ns
0
25
ns
80
3,475
ns
80
3,475
ns
300
10,425
ns
− 10
20
ns
− 10
20
ns
CL[2]
CL[1]
FRM
M
DD [3:0]
t_CL1d
t_CL2h
t_DDd
t_clk
t_CL2d
t_{clk_low}
t_{clk_high}
t_FRMd
t_Md
Figure 8. LCD Controller Timing Measurement
DS507PP1
Copyright 2001 Cirrus Logic (All Rights Reserved)
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