WM0011 Datasheet, PDF (41/233 Pages) Cirrus Logic – General Purpose Low-Power Audio DSP

WM0011
Production Data
The HiFi EP™ DSP core interrupts are described in Table 12.
All of these interrupts are Active High at the input to the HiFi EP™ DSP core.
HIFI EP™ DSP
INTERRUPT
(TYPE/PRIORITY)
Int0 (Level/1)
Int1 (Level/1)
Int2 (Level/2)
Int3 (Level/1)
Int4 (Level/1)
Int5 (Level/1)
Int6 (TMR/1)
Int7 (Software/1)
Int8 (Level/2)
Int9 (Level/3)
Int10 (Timer/3)
Int11 (Software/3)
Int12 (Level/4)
Int13 (TMR/5)
Int14 (NMI/7)
Int15 (Level/1)
Int16 (Level/1)
Int17 (Level/1)
Int18 (Level/1)
Int19 (Level/1)
Int20 (Level/1)
Int21 (Level/1)
Int22 (Level/1)
Int23 (Level/1)
Int24 (Level/1)
Int25 (Level/1)
Int26 (Level/1)
Int27 (Level/1)
Int28 (Level/1)
DESCRIPTION
SPI interrupt
UART interrupt
Reserved
WDT interrupt
I2C interrupt
PKA interrupt
HiFi EP™ Timer0
HiFi EP™ Software
Reserved
STANDBY input pin
HiFi EP™ Timer1
HiFi EP™ Software
FIRQ_N interrupt
HiFi EP™ Timer2
Non-Maskable Interrupt
IRQ_N interrupt
AIF 1 interrupt
AIF 2 interrupt
AIF 3 interrupt
DMA interrupt
Reserved
TMR 1 interrupt
TMR 2 interrupt
TMR 3 interrupt
Reserved
Reserved
Software interrupt 15
Software interrupt 14
GINT1
Int29 (Level/1)
GINT2
Int30 (Level/1)
Reserved
Int31 (WriteErr)
AHB bus error
Table 12 DSP Core Interrupts
SOURCE
SPI controller
UART controller
Watchdog Timer
I2C controller
PKA controller
Internal to HiFi EP™ core
Internal to HiFi EP™ core
¯S¯T¯A¯N¯¯D¯B¯Y¯ input pin
Internal to HiFi EP™ core
Internal to HiFi EP™ core
IRQC module
Internal to HiFi EP™ core
IRQC module
AIF controller #1
AIF controller #2
AIF controller #3
DMA controller
TIMER 1 module
TIMER 2 module
TIMER 3 module
IRQC module
IRQC module
GPIO pin
(selected using GINT1_SEL -
CCM_CONTROL register)
GPIO pin
(selected using GINT2_SEL -
CCM_CONTROL register)
Internal to HiFi EP™ core
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PD, Rev 4.1, August 2013
41