CDB5376 Datasheet, PDF (34/78 Pages) Cirrus Logic – Multichannel Seismic Evaluation System

CDB5376
lators are 4-wire INR+, INF+, INF-, INR- quad groups, and are routed with INF+ and INF- as a traditional
differential pair and INR+ and INR- as guard traces outside the respective INF+ and INF- traces.
INR+
INF+
INF-
INR-
INR+
INF+
INF-
INR-
Figure 5. Quad Group Routing
2.5.3 Bypass Capacitors
Each device power supply pin includes 0.1 µF bypass capacitors placed as close as possible to the pin
on the back side of the PCB. Each power supply net includes at least 100 µF bulk capacitance as a charge
well for transient current loads.
TOP
BOTTOM
Figure 6. Bypass Capacitor Placement
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DS612DB2