CDB5376 Datasheet, PDF (22/78 Pages) Cirrus Logic – Multichannel Seismic Evaluation System

CDB5376
Modulator ∆Σ data is input through the modulator interface.
Modulator Signals
MCLK
MCLK/2
MSYNC
MDATA[1..4]
MFLAG[1..4]
Description
Modulator clock output
Modulator clock output, half-speed
Modulator synchronization output
Modulator delta-sigma data inputs
Modulator over-range flag inputs
Test DAC ∆Σ data is generated by the test bit stream generator.
Test Bit Stream Signals Description
TBSDATA
Test DAC delta-sigma data output
TBSCLK
Test DAC clock output (unused on CDB5376)
Amplifier, modulator, and test DAC digital pins are controlled by the GPIO port.
GPIO Signals
GPIO[0..1]:MUX[0..1]
GPIO[2..4]:GAIN[0..2]
GPIO[5..7]:MODE[0..2]
GPIO[8]:PWDN
GPIO[9..10]
GPIO[11]:EECS
Description
Amplifier input mux selection
Amplifier gain / test DAC attenuation
Test DAC mode selection
Amplifier / modulator power down
Available general purpose input/output
Chip select for boot EEPROM
The secondary serial port (SPI 2) and boundary scan JTAG port are unused on CDB5376.
SPI2 Signals
SCK2
SO
SI[1..4]
JTAG Signals
TRSTz
TMS
TCK
TDI
TDO
Description
Serial clock output (unused on CDB5376)
Serial data output (unused on CDB5376)
Serial data inputs (unused on CDB5376)
Description
JTAG reset (unused on CDB5376)
JTAG test mode select (unused on CDB5376)
JTAG test clock input (unused on CDB5376)
JTAG test data input (unused on CDB5376)
JTAG test data output (unused on CDB5376)
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DS612DB2