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CS2100-OTP Datasheet, PDF (23/28 Pages) Cirrus Logic – Fractional-N Clock Multiplier | |||
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6.3.2
CS2100-OTP
AUX PLL Lock Output Configuration (AuxLockCfg)
When the AUX_OUT pin is configured as a lock indicator (AuxOutSrc[1:0] modal parameter = â11â), this
global parameter configures the AUX_OUT driver to either push-pull or open drain. It also determines the
polarity of the lock signal. If AUX_OUT is configured as a clock output, the state of this parameter is dis-
regarded.
AuxLockCfg
0
1
Application:
AUX_OUT Driver Configuration
Push-Pull, Active High (output âhighâ for unlocked condition, âlowâ for locked condition).
Open Drain, Active Low (output âlowâ for unlocked condition, high-Z for locked condition).
âAuxiliary Outputâ on page 18
Note: AUX_OUT is an unlock indicator, signalling an error condition when the PLL is unlocked. There-
fore, the pin polarity is defined relative to the unlock condition.
6.3.3
Reference Clock Input Divider (RefClkDiv[1:0])
Selects the input divider for the timing reference clock.
RefClkDiv[1:0]
00
01
10
11
Application:
Reference Clock Input Divider
REF_CLK Frequency Range
÷ 4.
32 MHz to 75 MHz (50 MHz with XTI)
÷ 2.
16 MHz to 37.5 MHz
÷ 1.
8 MHz to 18.75 MHz
Reserved.
âInternal Timing Reference Clock Dividerâ on page 10
6.3.4
Enable PLL Clock Output on Unlock (ClkOutUnl)
Defines the state of the PLL output during the PLL unlock condition.
ClkOutUnl
0
1
Application:
Clock Output Enable Status
Clock outputs are driven âlowâ when PLL is unlocked.
Clock outputs are always enabled (results in unpredictable output when PLL is unlocked).
âPLL Clock Outputâ on page 17
6.3.5
Low-Frequency Ratio Configuration (LFRatioCfg)
Determines how to interpret the currently indexed 32-bit User Defined Ratio .
LFRatioCfg
0
1
Application:
Ratio Bit Encoding Interpretation
20.12 - High Multiplier.
12.20 - High Accuracy.
âUser Defined Ratio (RUD)â on page 14
DS841PP1
23
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