CS2100-OTP Datasheet, PDF (15/28 Pages) Cirrus Logic – Fractional-N Clock Multiplier

5.4.2
CS2100-OTP
Manual Ratio Modifier (R-Mod)
The manual Ratio Modifier is used to internally multiply/divide the currently addressed R_UD (Ratio_0-3
stored in the register space remain unchanged). The available options for R-Mod are summarized in
Table 2 on page 15. R-Mod is enabled via the M2 pin in conjunction with the appropriate setting of the
M2Config[2:0] global parameter (see Section 5.7.2 on page 19).
RModSel[1:0]
00
01
10
11
R Modifier
0.5
0.25
0.125
0.0625
Table 2. Ratio Modifier
Referenced Control
Parameter Definition
Ratio 0-3................................“Ratio 0 - 3” on page 22
RModSel[1:0] ........................“R-Mod Selection (RModSel[1:0])” section on page 21
M2Config[2:0]........................“M2 Pin Configuration (M2Config[2:0])” on page 24
5.4.3
Automatic Ratio Modifier (Auto R-Mod)
The Automatic R-Modifier uses the CLK_IN Frequency Range Detector to implement a frequency depen-
dent multiply of the currently addressed R_UD as shown in Table 3. The CLK_IN Frequency Range Detec-
tor determines the ratio between the frequency of the internal SysClk and the CLK_IN input signal. The
result of the ratio measurement is the internal status signal called FsDetect[1:0].
Like with R-Mod, the Ratio_0-3 parameters stored in the one time programmable memory remain un-
changed. The Automatic Ratio Modifier is enabled either by the AutoRMod modal parameter or via the
M2 pin in conjunction with the appropriate setting of the M2Config[2:0] global parameter (see Section
5.7.2 on page 19).
FsDetect[1:0]
00
01
10
f_SysClk / f_{CLK_IN}
> 224
96 - 224
< 96
Auto R Modifier
1
0.5
0.25
Table 3. Automatic Ratio Modifier
It is important to note that Auto R-Mod (if enabled) is applied in addition to any R-Mod already selected
by the RModSel[1:0] modal parameter and is used to calculate the Effective Ratio (see Section 5.4.4 on
page 16).
Auto R-Mod can be used to generate the appropriate oversampling clock (MCLK) for audio A/D and D/A
converters. For example, if the clock applied to CLK_IN is the audio sample rate, Fs (also known as the
word, frame or Left/Right clock), and SysClk is 12.288 MHz (REF_CLK = 12.288 MHz with RefClkDiv[1:0]
DS841PP1
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