CS2100-OTP Datasheet, PDF (12/28 Pages) Cirrus Logic – Fractional-N Clock Multiplier

CS2100-OTP
main unlocked for the specified time listed in the “AC Electrical Characteristics” on page 7 after which lock
will be acquired and the PLL output will resume.
2²³ SysClk cycles
Lock Time
2²³ SysClk cycles
Lock Time
CLK_IN
CLK_IN
ClkSkipEn=0 or 1
ClkOutUnl=0
PLL_OUT
ClkSkipEn=0 or 1
ClkOutUnl=1
PLL_OUT
UNLOCK
UNLOCK
= invalid clocks
Figure 6. CLK_IN removed for > 2²³ SysClk cycles
f CLK_IN is removed and then reapplied within 2²³ SysClk cycles but later than t_CS, the ClkSkipEn pa-
rameter will have no effect and the PLL output will continue until CLK_IN is re-applied (see Figure 7).
Once CLK_IN is re-applied, the PLL will go unlocked only for the time it takes to acquire lock; the
PLL_OUT state will be determined by the ClkOutUnl parameter during this time.
2²³ SysClk cycles
tCS
Lock Time
2²³ SysClk cycles
tCS
Lock Time
CLK_IN
CLK_IN
ClkSkipEn=0 or 1
ClkOutUnl=0
PLL_OUT
ClkSkipEn=0 or 1
ClkOutUnl=1
PLL_OUT
UNLOCK
UNLOCK
= invalid clocks
Figure 7. CLK_IN removed for < 2²³ SysClk cycles but > t_CS
If CLK_IN is removed and then re-applied within t_CS, the ClkSkipEn parameter determines whether
PLL_OUT continues while the PLL re-acquires lock (see Figure 8). When ClkSkipEn is disabled and
CLK_IN is removed the PLL output will continue until CLK_IN is re-applied at which point the PLL will go
unlocked only for the time it takes to acquire lock; the PLL_OUT state will be determined by the ClkOutUnl
parameter during this time. When ClkSkipEn is enabled and CLK_IN is removed the PLL output clock will
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