CS4222_02 Datasheet, PDF (21/29 Pages) Cirrus Logic – 20-Bit Stereo Audio Codec with Volume Control

CS4222
4.6 Control Port Interface
The control port is used to load all the internal settings. The operation of the control port may be completely
asynchronous with the audio sample rate. However, to avoid potential interference problems, the control port
pins should remain static if no operation is required.
The control port has 2 modes: SPI^® and I²C^®, with the CS4222 operating as a slave device. If I²C operation is
desired, AD0/CS should be tied to VD or DGND. If the CS4222 ever detects a negative transition on AD0/CS
after power-up, SPI mode will be selected.
4.6.1 SPI Mode
In SPI mode, CS is the CS4222 chip select signal, CCLK is the control port bit clock, CDIN is the input data
line from the microcontroller and the chip address is 0010000. All signals are inputs and data is clocked in
on the rising edge of CCLK.
Figure 11 shows the operation of the control port in SPI mode. To write to a register, bring CS low. The first
7 bits on CDIN form the chip address, and must be 0010000. The eighth bit is a read/write indicator (R/W),
which must be low to write. Register reading from the CS4222 is not supported in the SPI mode. The next
8 bits form the Memory Address Pointer (MAP), which is set to the address of the register that is to be up-
dated. The next 8 bits are the data which will be placed into a register designated by the MAP.
The CS4222 has a MAP auto increment capability, enabled by the INCR bit in the MAP register. If INCR is
a zero, then the MAP will stay constant for successive writes. If INCR is set to a 1, then MAP will auto incre-
ment after each byte is written, allowing block writes of successive registers. Register reading from the
CS4222 is not supported in the SPI mode.
CS
CCLK
CDIN
CHIP
ADDRESS
0010000
MAP
DATA
R/W
MSB
byte 1
MAP = Memory Address Pointer
Figure 11. Control Port Timing, SPI mode
LSB _{00000000000000000000000000000000}
byte n
DS236F1
21