CS4354 Datasheet, PDF (17/25 Pages) Cirrus Logic – 5 V Stereo DAC with 2 VRMS Ground-centered Output

USER: Apply Power
Power-On Reset State
Power-Down State
USER: Apply MCLK
Initialization State
USER: Apply LRCK
MCLK/LRCK Ratio Detection
USER: Change MCLK/LRCK ratio
Valid MCLK/LRCK Ratio
Power-Up State
Outputs Muted
CS4354
USER:
Remove MCLK
USER: No SCLK
SCLK mode = internal
Normal Operation
D e -e m p h a sis
Is Selectable
USER: Applied SCLK
SCLK mode = external
Normal Operation
D e-e m ph a sis
Is Disabled
Valid MCLK/LRCK Ratio
Analog Output
is Generated
USER: Change MCLK/LRCK ratio
Mute State
Figure 9. Initialization and Power-Down Sequence Diagram
DS895A2
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