CS2300-CP Datasheet, PDF (17/32 Pages) Cirrus Logic – Fractional-N Clock Multiplier with Internal LCO

CS2300-CP
MHz, then FsDetect[1:0] reflects the frequency range of the audio sample rate. An R_UD of 512 generates
the audio oversampling clocks as shown in Table 4.
FsDetect[1:0]
Speed Mode (used for Audio Oversampling
Inferred Audio Sample Rate audio converters)
Clock
00
< [59 to 72] kHz
Single Speed
512 x
01
>[59 to 72] kHz
Double Speed
256 x
and
<[138 to 168] kHz
10
> [138 to 168] kHz
Quad Speed
128 x
Table 4. Example Audio Oversampling Clock Generation from CLK_IN
Referenced Control
Register Location
Ratio......................................“Ratio (Address 06h - 09h)” on page 27
RModSel[2:0] ........................“R-Mod Selection (RModSel[2:0])” section on page 25
AutoRMod .............................“Auto R-Modifier Enable (AutoRMod)” on page 25
5.3.4
Effective Ratio (R_EFF)
The Effective Ratio (R_EFF) is an internal calculation comprised of R_UD and the appropriate modifiers, as
previously described. R_EFF is calculated as follows:
R_EFF = R_UD • R_MOD • Auto R-Mod
Ratio modifiers which would produce an overflow or truncation of R_EFF should not be used; For example
if R_UD is 1024 an R_MOD of 8 would produce an R_EFF value of 8192 which exceeds the 4096 limit of the
12.20 format. In all cases, the maximum and minimum allowable values for R_EFF are dictated by the fre-
quency limits for both the input and output clocks as shown in the “AC Electrical Characteristics” on
page 7.
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