CS4226 Datasheet, PDF (6/60 Pages) Cirrus Logic – Surround Sound Codec

CS4226
SWITCHING CHARACTERISTICS - CONTROL PORT (TA = 25°C VD+, VA+ = 5V ±5%;
Inputs: logic 0 = DGND, logic 1 = VD+, C_L = 30 pF)
Parameter
SPI Mode (SPI/I²C = 0)
Symbol
Min
Max
Units
CCLK Clock Frequency
CS High Time Between Transmissions
CS Falling to CCLK Edge
CCLK Low Time
CCLK High Time
CDIN to CCLK Rising Setup Time
CCLK Rising to DATA Hold Time
CCLK Falling to CDOUT stable
Rise Time of CDOUT
Fall Time of CDOUT
Rise Time of CCLK and CDIN
Fall Time of CCLK and CDIN
f_sck
-
t_csh
1.0
t_css
20
t_scl
66
t_sch
66
t_dsu
40
(Note 10)
t_dh
15
t_pd
t_r1
t_f1
(Note 11)
t_r2
(Note 11)
t_f2
6
MHz
µs
ns
ns
ns
ns
ns
45
ns
25
ns
25
ns
100
ns
100
ns
Notes: 10. Data must be held for sufficient time to bridge the transition time of CCLK.
11. For F_SCK < 1 MHz
CS
t _css
t _scl t _sch
t _csh
CCLK
t _r2
t _f2
CDIN
CDOUT
t _{dsu t dh t pd}
6
DS188F1