CS4226 Datasheet, PDF (41/60 Pages) Cirrus Logic – Surround Sound Codec

CDB4226
CONNECTOR CONNECTOR TYPE INPUT /
NAME
OUTPUT
+5 VA
binding post
input
+5 VD
binding post
input
+/- 12 V
binding post
input
AGND
binding post
input
GND
binding post
input
AIN1L, AIN1R RCA
inputs
AIN2L, AIN2R RCA
inputs
AIN3L, AIN3R RCA
inputs
AINAUX
RCA
input
OUT1 - OUT6 RCA
outputs
RX_DIG
RCA
input
RX_OPT
Toslink
input
8402_DIG
RCA
output
8402_OPT
Toslink
output
DATAUX
header (AUX_HDR) input
LRCLKAUX,
SCLKAUX
header (AUX_HDR) inputs/outputs
CLKOUT1
header (AUX_HDR) output
SCL/CCLK1 header (DSP_HDR) input
SDA/CDOUT1 header (DSP_HDR) bidirectional
SDIN1, SDIN2, header (DSP_HDR) inputs
SDIN3
XT
header (DSP_HDR) input/output
CLKOUT
LRCK, SCLK
SDOUT1,
SDOUT2
PC CONN
header (DSP_HDR) output
header (DSP_HDR) inputs/outputs
header (DSP_HDR) outputs
DB-25
inputs/outputs
SIGNAL PRESENT
+5 Volts for analog section
+5 Volts for digital section
+/- 12 Volts for analog input and output buffers
analog ground connection from power source
digital ground connection from power source
left and right channel analog inputs, 1st stereo pair
left and right channel analog inputs, 2nd stereo pair
left and right channel analog inputs, 3rd stereo pair
auxiliary analog input
six buffered and filtered DAC output channels
coaxial input to RX1 of CS4226 S/PDIF receiver
optical input to RX2, 3, or 4 of CS4226 S/PDIF receiver
CS8402A digital output via transformer
CS8402A digital output via optical transmitter
AUX port serial data input
I/O for AUX port serial and left/right clocks
buffered CLKOUT from CS4226
serial control clock for I²C interface
control data I/O line for I²C interface
DSP port serial data inputs
DSP port XTI input access, or buffered XTO from
CS4226
buffered CLKOUT from CS4226
I/O for DSP port serial and left/right clocks
DSP port serial data outputs
DB-25 connector to PC for SPI/I²C control port signals
Table 2. System Connections
Byte. This clock line is useful for synchronizing
external A/D converters or other peripheral compo-
nents. CLKOUT1 can be tristated by selecting the
position of the CLK_SEL jumper, defined in
Table 1. This feature may be useful in interfacing
other Crystal evaluation boards (CDB5330A and
CDB5334/35 for example) to the CDB4226, as it
prevents a drive contention on the MCLK output of
these boards.
S/PDIF Input Interface
The optical and coaxial digital inputs labeled
RX_OPT and RX_DIG (Figure 8) allow access to
the on-chip S/PDIF receiver, which can receive and
decode one of four S/PDIF input sources. Setting
the CS2/1/0 bits in the Clock Mode Byte to 4, 5, 6,
or 7 (hex) will configure the CS4226 to choose
RX1, RX2, RX3, or RX4, respectively, as the
S/PDIF input source. The coaxial input, RX_DIG,
is dedicated to the RX1 input on the CS4226. The
optical input, RX_OPT, can be routed to one of the
three other S/PDIF receiver input pins by using the
RX_SEL jumper. Setting RX_SEL to the RX2,
RX3, or RX4 position will route the S/PDIF data
from the optical input to the RX2, RX3, or RX4 pin
of the codec.
DS188DB1
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