EP9312 Datasheet, PDF (50/62 Pages) Cirrus Logic – Universal Platform System-on-chip Processor

EP9312
Universal Platform SOC Processor
LCD Interface
Parameter
SPCLK rise/fall time
SPCLK rising edge to control signal transition time
SPCLK rising edge to data transition time
Data valid time
Symbol
t_clkr
t_CD
t_DD
t_Dv
Min
2
-
-
t_SPCLK
Typ
-
-
-
-
Max
8
3
10
-
Unit
ns
ns
ns
ns
SPCLK
HSYNC/
V_CSYNC/
BLANK/
BRIGHT
P [17:0]
t_clkrf
t_clkrf
t_CD
t_DD
t_Dv
Figure 35. LCD Timing Measurement
50
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DS515PP7