EP9312 Datasheet, PDF (36/62 Pages) Cirrus Logic – Universal Platform System-on-chip Processor

EP9312
Universal Platform SOC Processor
DSTROBE
(device)
DD (15:0)
(device)
DSTROBE
(host)
DD (15:0)
(host)
t_DVH
t_DH
t_CYCRD
t_2CYCRD
t_CYCRD
t_DVS
t_DVH
t_DVS
t_2CYCRD
t_DVH
t_DS
t_DH
t_DS
t_DH
Note:
DD (15:0) and DSTROBE signals are shown at both the host and the device to emphasize that cable settling time as well as
cable propagation delay shall not allow the data signals to be considered stable at the host until some time after they are driven
by the device.
Figure 20. Sustained Ultra DMA data-in Burst
DMARQ
(device)
DMACKn
(host)
STOP
(host)
HDMARDYn
(host)
DSTROBE
(device)
DD(15:0)
(device)
36
t_RP
t_SR
t_RFS
Figure 21. Host Pausing an Ultra DMA data-in Burst
©Copyright 2005 Cirrus Logic (All Rights Reserved)
DS515PP7