CS4281 Datasheet, PDF (32/36 Pages) Cirrus Logic – CrystalClear PCI Audio interface

CS4281
CrystalClear™ PCI Audio Interface
APPENDIX A. MIGRATION FROM A CS4280 DESIGN TO A CS4281 DESIGN
The CS4281-CM is designed to be backward compatible with the CS4280-CM PWB footprint. When the
CS4281 is placed in a CS4280-designed board, the CS4281 will provide the same level of functionality as
the CS4280-CM. The CS4281 is not be available in the 128-pin TQFP package; however, a 100-pin TQFP
package is available for notebook designs. The following descriptions apply only to the 100-pin MQFP
package.
Several supply pins have been redefined on the CS4281. The functionality of two additional pins has been
modified to support additional features. Modified pin definitions default to CS4280 functionality.
Upgraded Pins
• IRQC (pin 18) – replaced CGND[0]
• IRQB (pin 19) – replaced CVDD[0]
• IRQA (pin 25) – replaced SERR#
• TESTSEL (pin 64) – replaced CVDD[3]
• ASDIN2/GPIO1 (pin 66) – replaced GPIO
• PME# (pin 67) – replaced CGND[4]
• VAUX (pin 68) – replaced CVDD[4]
• CLKRUN# (pin 93) – replaced PCIGND[1]
• GPIO3 (pin 94) – replaced PCIVDD[1]
IRQ[A:C] - ISA interrupt pins
Three pins have been redefined as ISA IRQ signals for DOS legacy game support. For
backward compatibility, these pins default to high impedance. Pin 18 will be connected to
ground, pin 19 will be connected to VDD, and Pin 25 will be connected SERR#. High
impedance pins connected to the supply rail results in no damage or excess current being
drawn by that pin. The SERR# pin (25) on the CS4280 has no useful functionality. An audio
device has no condition whereby it must generate a system error. The SERR# pin on the
CS4281 has been eliminated. Pin 25 is held in a high impedance state by power-on default.
TESTSEL - Test Mode Select pin
Pin 64 was formerly a supply pin (CVDD[4]). This pin is designated for selecting test modes
for production testing. This pin must be left floating or tied to a core power supply pin for
normal operation. This pin is tied to CVDD on the CS4280 PWB layout.
ASDIN2/GPIO1 - Secondary Codec Data In / General Purpose I/O Pin
The ASDIN2 function is added to the GPIO pin. The function is determined by the AC-Link
configuration setup. The power-up default is the GPIO functionality.
PME# - PCI Power Management Event
The PME# is a new function added to the CS4281. It is an open drained output used to indicate
a power management event. For the CS4280 layout, this pin will be grounded.
VAUX - PCI Auxiliary Power Supply
VAUX maintains limited device functionality when the normal VDD is turned off in the
CS4281. When the CS4281 is used on the CS4280 layout, this pin will be tied to normal VDD.
CIRRUS LOGIC PRODUCT DATA SHEET
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