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CS4281 Datasheet, PDF (27/36 Pages) Cirrus Logic – CrystalClear PCI Audio interface
CS4281
CrystalClear™ PCI Audio Interface
INTA# - Host Interrupt A, Open Drain Output
INTA# is the level triggered interrupt pin dedicated to servicing internal device interrupt
sources.
PCICLK - PCI Bus Clock, Input
PCICLK is the PCI bus clock for timing all PCI transactions. All PCI synchronous signals are
generated and sampled relative to the rising edge of this clock.
RST# - PCI Device Reset, Input
RST# is the PCI bus master reset.
VDD5REF - Clean 5 V Power Supply
VDD5REF is the power connection pin for the 5 V PCI pseudo supply for the PCI bus drivers.
The internal core logic runs on 3.3 Volts. This pin enables the PCI interface to support and be
tolerant of 5 Volt signals. For a 5 Volt PCI Bus, VDD5REF must be connected to +5 Volts.
PCIVDD[7:2,0] - PCI Bus Driver Power Supply
PCIVDD pins are the PCI driver power supply pins. These pins must have a nominal
+3.3 Volts.
PCIGND[7:2,0] - PCI Bus Driver Ground Pins
PCIGND pins are the PCI driver ground reference pins.
PME# - PCI Power Management Event, Open Drain, Output
PME# signals a PCI Power Management event. This pin powers up high impedance for
backwards compatibility. It is also backwards compatible since the previous function was a
ground pin. PME# functionality is powered from the VAUX power supply to support D3cold
wake-up from the AC Link.
CLKRUN# - Optional System Clock Control, I/O, Open Drain
CLKRUN# is an optional PCI signal defined for mobile operations. As an input, high indicates
that the PCICLK is active. The bus controller drives CLKRUN# low when it wants to stop the
PCICLK. As an output, driven low to request that the PCICLK be activated or not stopped. If
not used, this pin must have a weak pull-down attached to keep low. This pin is backwards
compatible since the previous function was a ground pin.
VAUX - PCI Auxiliary Power Supply, Power
Auxiliary 3.3 Volt VDD pin used to maintain limited device funcitonality when the normal
VDD is turned off. This pin is backwards compatible since the previous function was a core
power supply pin with the same voltage.
External Interface Pins
TEST - Test Mode, Input
This pin must be tied to ground.
TESTSEL - Test Mode Select, Input with Pullup
This pin must be left floating or tied to a core power supply pin for normal operation.
CIRRUS LOGIC PRODUCT DATA SHEET
DS308PP4
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