CS4281 Datasheet, PDF (26/36 Pages) Cirrus Logic – CrystalClear PCI Audio interface

CS4281
CrystalClear™ PCI Audio Interface
PCI Interface
AD[31:0] - Address/Data Bus, I/O
These pins form the multiplexed address / data bus for the PCI interface.
C/BE[3:0]# - Command Type / Byte Enables, I/O
These four pins are the multiplexed command / byte enables for the PCI interface. During the
address phase of a transaction, these pins indicate cycle type. During the data phases of a
transaction, active low byte enable information for the current data phase is indicated. These
pins are inputs during slave operation and they are outputs during bus mastering operation.
PAR - Parity, I/O
The Parity pin indicates even parity across AD[31:0] and C/BE[3:0] for both address and data
phases. The signal is delayed one PCI clock from either the address or data phase for which
parity is generated.
FRAME# - Cycle Frame, I/O
FRAME# is driven by the current PCI bus master to indicate the beginning and duration of a
transaction.
IRDY# - Initiator Ready, I/O
IRDY# is driven by the current PCI bus master to indicate that the initiator is ready to transmit
or receive data (complete the current data phase).
TRDY# - Target Ready, I/O
TRDY# is driven by the current PCI bus target to indicate that the target device is ready to
transmit or receive data (complete the current data phase).
STOP# - Transition Stop, I/O
STOP# is driven active by the current PCI bus target to indicate a request to the master to stop
the current transaction.
IDSEL - Initialize Device Select, Input
IDSEL is used as a chip select during PCI Configuration Space read and write cycles.
DEVSEL# - Device Select, I/O
DEVSEL# is driven by the PCI bus target device to indicate that it has decoded the address of
the current transaction as its own chip select range.
REQ# - Master Request, Three-State Output
REQ# indicates to the system arbiter that the CS4281 is requesting access to the PCI bus. This
pin is high-impedance when RST# is active.
GNT# - Master Grant, Input
GNT# is driven by the system arbiter to indicate that CS4281 owns the PCI Bus.
PERR# - Parity Error, I/O
PERR# is used for reporting data parity errors on the PCI bus.
CIRRUS LOGIC PRODUCT DATA SHEET
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DS308PP4