CS4281 Datasheet, PDF (16/36 Pages) Cirrus Logic – CrystalClear PCI Audio interface

CS4281
CrystalClear™ PCI Audio Interface
GPSS
GPPS
GP1D
GP3D
VDNLT
VDNPO
VDNST
VDNW
VUPLT
VUPPO
VUPST
VUPW
GP1OE
GP_INT input Secondary Status. A general purpose input pin on the Secondary Codec
(ASDIN2) caused AC-Link slot 12, GP_INT to set. Writing GPSS = 0 clears the locally stored
copy; however, since the interrupt condition occurred in the Secondary Codec, the condition
must be removed through the Secondary Codec GPIO Pin Sticky register, Index 54h.
GP_INT input Primary Status. A general purpose input pin on the Primary Codec caused AC-
Link slot 12, GP_INT to set. Writing GPPS = 0 clears the locally stored copy; however, since
the interrupt condition occurred in the Primary codec, the condition must be removed through
the Primary Codec GPIO Pin Sticky register, Index 54h.
GPIO1 output data. When ASDIN2/GPIO1 is not ASDIN2 and is configured as an output
(GP1OE = 1), writes to this bit are presented on the ASDIN2/GPIO1 pin.
GPIO3 output data. When configured as an output (GP3OE = 1), writes to this bit are
presented on the GPIO3 pin. Note that in backward-compatible sockets, this pin is a PCI
power supply pin.
Volume Down Load/Type. Function dependent on whether hardware volume is enabled.
Hardware Volume Control Enabled:
0 - GPIO logic input reflects the pin status directly
1 - GPIO logic input is pulse from Down hardware volume control logic. When a hardware
volume change is generated from VOLDN, a pulse is sent to this GPIO input.
Hardware Volume Control Disabled:
0 - Enable VOLDN pin pullup
1 - Disable VOLDN pin pullup
Volume Down input Polarity.
0 - active low
1 - active high
Volume Down input Sticky.
1 - VOLDN input pin is latched, for edge sensitive inputs, and presented on the VNDS bit. The
VDNS bit is cleared by writing a 0 to VDNS.
0 - VOLDN input pin (after VNDPO) is presented on VDNS bit for level sensitive inputs.
Volume Down Wake. When set, VOLDN can cause a wake-up event (asserts PME#). VDNST
must be set sticky for this bit to be effective.
Volume Up Load/Type. Function dependent on whether hardware volume is enabled.
Hardware Volume Control Enabled:
0 - GPIO logic input reflects the pin status directly
1 - GPIO logic input is pulse from Up hardware volume control logic. When a hardware volume
change is generated from VOLUP, a pulse is sent to this GPIO input.
Hardware Volume Control Disabled:
0 - Enable VOLUP pin pullup
1 - Disable VOLUP pin pullup
Volume Up input Polarity.
0 - active low
1 - active high
Volume Up input Sticky.
1 - VOLUP input pin is latched, for edge sensitive inputs, and presented on the VUPS bit. The
VUPS bit is cleared by writing a 0 to VUPS.
0 - VOLUP input pin (after VUPPO) is presented on VUPS bit for level sensitive inputs.
Volume Up Wake-up. When set, VOLUP can cause a wake-up event (asserts PME#). VUPST
must be set sticky for this bit to be effective.
Output Enable ASDIN2/GPIO1. When this pin is not configured as ASDIN2, setting this bit
enables the output buffer allowing writes to the GP1D bit to be presented on the pin.
0 - Output disabled, pin is configured as an input (reset default)
1 - Output enabled
CIRRUS LOGIC PRODUCT DATA SHEET
16
DS308PP4