DAC8560 Datasheet, PDF (21/29 Pages) Burr-Brown (TI) – 16-Bit, Ultra-Low Glitch, Voltage Output DIGITAL-TO-ANALOG CONVERTER with 2.5V, 2ppm/°C Internal Reference

DAC8560
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POWER-DOWN MODES
The DAC8560 supports four separate modes of
operation. These modes are programmable by
setting two bits (PD1 and PD0) in the control
register. Table 5 shows how to control the operating
mode with data bits PD1 (DB17) and PD0 (DB16).
PD1
(DB17)
0
0
1
1
Table 5. Operating Modes
PD0
(DB16)
0
1
0
1
OPERATING MODE
Normal operation
Power-down 1 kΩ to GND
Power-down 100 kΩ to GND
Power-down High-Z
When both bits are set to '0', the device works
normally with its typical current consumption of
530µA at 5.5V. However, for the three power-down
modes, the supply current falls to 1.2µA at 5.5V
(0.7µA at 3.6V). Not only does the supply current fall,
but the output stage is also internally switched from
the output of the amplifier to a resistor network of
known values.
SLAS464 – DECEMBER 2006
The advantage of this switching is that the output
impedance of the device is known while it is in
power-down mode. As shown in Table 5, there are
three different power-down options. V_OUT can be
connected internally to GND through a 1kΩ resistor,
a 100kΩ resistor, or open circuited (High-Z). The
output stage is illustrated in Figure 66.
V_FB
Resistor
String
DAC
Amplifier
Power-Down
Circuitry
V_OUT
Resistor
Network
Figure 66. Output Stage During Power Down
All analog circuitry is shut down when the
power-down mode is activated. However, the
contents of the DAC register are unaffected when in
power down. The time to exit power-down is typically
2.5µs for V_DD = 5V, and 5µs for V_DD = 3V. See the
Typical Characteristics for more information.
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