DAC8560 Datasheet, PDF (18/29 Pages) Burr-Brown (TI) – 16-Bit, Ultra-Low Glitch, Voltage Output DIGITAL-TO-ANALOG CONVERTER with 2.5V, 2ppm/°C Internal Reference

DAC8560
SLAS464 – DECEMBER 2006
THEORY OF OPERATION
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DIGITAL-TO-ANALOG CONVERTER (DAC)
The DAC8560 architecture consists of a string DAC
followed by an output buffer amplifier. Figure 62
shows a block diagram of the DAC architecture.
DAC
Register
V_REF
50kW
62kW
REF (+)
Register String
REF (-)
50kW
V_FB
V_OUT
GND
Figure 62. DAC8560 Architecture
The input coding to the DAC8560 is straight binary,
so the ideal output voltage is given by:
V _OUT
+
D_IN
65536
V _REF
where D_IN = decimal equivalent of the binary code
that is loaded to the DAC register; it can range from
0 to 65535.
RESISTOR STRING
The resistor string section is shown in Figure 63. It is
simply a string of resistors, each of value R. The
code loaded into the DAC register determines at
which node on the string the voltage is tapped off to
be fed into the output amplifier by closing one of the
switches connecting the string to the amplifier. It is
monotonic because it is a string of resistors.
OUTPUT AMPLIFIER
The output buffer amplifier is capable of generating
rail-to-rail voltages on its output, giving an output
range of 0V to V_DD. It is capable of driving a load of
2kΩ in parallel with 1000pF to GND. The source and
sink capabilities of the output amplifier can be seen
in the Typical Characteristics. The slew rate is
1.8V/µs with a full-scale settling time of 8µs with the
output unloaded.
V_REF
R_DIVIDER
V_REF
2
R
R
To Output Amplifier
(2x Gain)
R
R
Figure 63. Resistor String
The inverting input of the output amplifier is available
at the V_FB pin. This feature allows better accuracy in
critical applications by tying the V_FB point and the
amplifier output together directly at the load. Other
signal conditioning circuitry may also be connected
between these points for specific applications.
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