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| DAC8560 Datasheet, PDF (16/29 Pages) Burr-Brown (TI) – 16-Bit, Ultra-Low Glitch, Voltage Output DIGITAL-TO-ANALOG CONVERTER with 2.5V, 2ppm/°C Internal Reference | |||
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DAC8560
SLAS464 â DECEMBER 2006
TYPICAL CHARACTERISTICS: DAC at VDD = 2.7V (continued)
At TA = +25°C, internal reference used, and DAC output not loaded, unless otherwise noted
www.ti.com
SUPPLY CURRENT
vs DIGITAL INPUT CODE
650
VDD = 2.7V
Internal VREF = 2.5V
600
1000
900
800
POWER-SUPPLY CURRENT
vs LOGIC INPUT VOLTAGE
VDD = 2.7V, Internal VREF Included,
SCLK Input
(all other digital inputs = GND)
Sweep from 0V to 2.7V
550
700
Sweep from 2.7V to 0V
600
500
500
450
0
8192 16384 24576 32768 40960 49152 57344 65536
Digital Input Code
Figure 50.
400
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
VLOGIC (V)
Figure 51.
FULL-SCALE SETTLING TIME:
2.7V RISING EDGE
FULL-SCALE SETTLING TIME:
2.7V FALLING EDGE
Rising
Edge
0.5V/div
Trigger Pulse 2.7V/div
VDD = 2.7V
Int VREF = 2.5V
From Code: 0000h
To Code: FFFFh
Zoomed Rising Edge
1mV/div
Time (2ms/div)
Figure 52.
Falling
Edge
0.5V/div
Trigger Pulse 2.7V/div
VDD = 2.7V
Int VREF = 2.5V
From Code: FFFFh
To Code: 0000h
Zoomed Falling Edge
1mV/div
Time (2ms/div)
Figure 53.
HALF-SCALE SETTLING TIME:
2.7V RISING EDGE
HALF-SCALE SETTLING TIME:
2.7V FALLING EDGE
Trigger Pulse 2.7V/div
Rising
Edge
0.5V/div
VDD = 2.7V
Int VREF = 2.5V
From Code: 4000h
To Code: CFFFh
Zoomed Rising Edge
1mV/div
Time (2ms/div)
Figure 54.
Trigger Pulse 2.7V/div
VDD = 2.7V
Int VREF = 2.5V
From Code: CFFFh
To Code: 4000h
Falling
Edge
0.5V/div
Zoomed Falling Edge
1mV/div
Time (2ms/div)
Figure 55.
16
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