DDC232 Datasheet, PDF (10/28 Pages) Burr-Brown (TI) – 32-Channel, Current-Input Analog-to-Digital Converter

DDC232
SBAS331C – AUGUST 2004 – REVISED SEPTEMBER 2006
Integration Capacitors
There are seven different capacitors available
on-chip for both sides of every channel in the
DDC232. These internal capacitors are trimmed in
production to achieve the specified performance for
range error of the DDC232. The range control bits
(Range[2:0]) change the capacitor value for all
integrators. Consequently, all inputs and both sides
of each input will always have the same full-scale
range. Table 1 shows the capacitor value selected
for each range selection.
Table 1. Range Selection
Range[2]
0
0
0
0
1
1
1
1
Range[1]
0
0
1
1
0
0
1
1
Range[0]
0
1
0
1
0
1
0
1
C_F
(pF, typ)
3
12.5
25
37.5
50
62.5
75
87.5
INPUT
RANGE
(pC, typ)
–0.04 to 12.5
–0.2 to 50
–0.4 to 100
–0.6 to 150
–0.8 to 200
–0.1 to 250
–1.2 to 300
–1.4 to 350
Voltage Reference
The external voltage reference is used to reset the
integration capacitors before an integration cycle
begins. It is also used by the ∆Σ converter while the
converter is measuring the voltage stored on the
integrators after an integration cycle ends. During
this sampling, the external reference must supply the
charge needed by the ∆Σ converter. For an
integration time of 333µs, this charge translates to an
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average VREF current of approximately 325µA. The
amount of charge needed by the ∆Σ converter is
independent of the integration time; therefore,
increasing the integration time lowers the average
current. For example, an integration time of 800µs
lowers the average VREF current to TBDµA.
It is critical that VREF be stable during the different
modes of operation (see Figure 5). The ∆Σ converter
measures the voltage on the integrator with respect
to VREF. Since the integrator capacitors are initially
reset to VREF, any drop in VREF from the time the
capacitors are reset to the time when the converter
measures the integrator output will introduce an
offset. It is also important that VREF be stable over
longer periods of time because changes in VREF
correspond directly to changes in the full-scale
range. Finally, VREF should introduce as little
additional noise as possible.
For these reasons, it is strongly recommended that
the external reference source be buffered with an
operational amplifier, as shown in Figure 6. In this
circuit, the voltage reference is generated by a
+4.096V reference. A low-pass filter to reduce noise
connects the reference to an operational amplifier
configured as a buffer. This amplifier should have
low noise and input/output common-mode ranges
that support VREF. Even though the circuit in
Figure 6 might appear to be unstable due to the
large output capacitors, it works well for most
operational amplifiers. It is not recommended that
series resistance be placed in the output lead to
improve stability since this can cause a drop in
VREF, which produces large offsets.
+5V
0.47µF
1
REF3140 ²
10kΩ
3
+
10µF
+5V
0.10µF
7
2
6
OPA350
3
0.10µF
4
+
10µF
To VREF Pin on
the DDC232
Figure 6. Recommended External Voltage Reference Circuit for Best Low-Noise Operation
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