SAM9G15_14 Datasheet, PDF (864/1215 Pages) ATMEL Corporation – ARM-based Embedded MPU

39.8.11 USART Interrupt Mask Register
Name:
US_IMR
Address: 0xF801C010 (0), 0xF8020010 (1), 0xF8024010 (2), 0xF8028010 (3)
Access:
Read-only
31
30
29
28
27
26
25
–
–
–
–
–
–
–
23
22
21
20
19
18
17
–
–
–
–
CTSIC
–
–
15
14
13
12
11
10
9
–
–
NACK
–
–
ITER
TXEMPTY
7
6
5
4
PARE
FRAME
OVRE
–
3
2
1
–
RXBRK
TXRDY
For SPI specific configuration, see “USART Interrupt Mask Register (SPI_MODE)” on page 865.
For LIN specific configuration, see “USART Interrupt Mask Register (LIN_MODE)” on page 866.
• RXRDY: RXRDY Interrupt Mask
• TXRDY: TXRDY Interrupt Mask
• RXBRK: Receiver Break Interrupt Mask
• OVRE: Overrun Error Interrupt Mask
• FRAME: Framing Error Interrupt Mask
• PARE: Parity Error Interrupt Mask
• TIMEOUT: Time-out Interrupt Mask
• TXEMPTY: TXEMPTY Interrupt Mask
• ITER: Max Number of Repetitions Reached Interrupt Mask
• NACK: Non Acknowledge Interrupt Mask
• CTSIC: Clear to Send Input Change Interrupt Mask
• MANE: Manchester Error Interrupt Mask
0: The corresponding interrupt is not enabled.
1: The corresponding interrupt is enabled.
24
MANE
16
–
8
TIMEOUT
0
RXRDY
SAM9G15 [DATASHEET]
11152F–ATARM–10-Mar-2014
864