SAM9G15_14 Datasheet, PDF (519/1215 Pages) ATMEL Corporation – ARM-based Embedded MPU

31.7.15 DMAC Channel x [x = 0..7] Descriptor Address Register
Name:
DMAC_DSCRx [x = 0..7]
Address:
0xFFFFEC44 (0)[0], 0xFFFFEC6C (0)[1], 0xFFFFEC94 (0)[2], 0xFFFFECBC (0)[3], 0xFFFFECE4 (0)[4],
0xFFFFED0C (0)[5], 0xFFFFED34 (0)[6], 0xFFFFED5C (0)[7], 0xFFFFEE44 (1)[0], 0xFFFFEE6C (1)[1],
0xFFFFEE94 (1)[2], 0xFFFFEEBC (1)[3], 0xFFFFEEE4 (1)[4], 0xFFFFEF0C (1)[5], 0xFFFFEF34 (1)[6],
0xFFFFEF5C (1)[7]
Access:
Read-write
Reset:
0x00000000
31
30
29
28
27
26
25
24
DSCR
23
22
21
20
19
18
17
16
DSCR
15
14
13
12
11
10
9
8
DSCR
7
6
5
4
3
2
1
0
DSCR
DSCR_IF
This register can only be written if the WPEN bit is cleared in “DMAC Write Protect Mode Register” .
• DSCR_IF: Descriptor Interface Selection
Value
00
01
Name
AHB_IF0
AHB_IF1
Description
The buffer transfer descriptor is fetched via AHB-Lite Interface 0
The buffer transfer descriptor is fetched via AHB-Lite Interface 1
• DSCR: Buffer Transfer Descriptor Address
This address is word aligned.
SAM9G15 [DATASHEET]
11152F–ATARM–10-Mar-2014
519