|
SAM9G15_14 Datasheet, PDF (212/1215 Pages) ATMEL Corporation – ARM-based Embedded MPU | |||
|
◁ |
23. Parallel Input/Output (PIO) Controller
23.1
Description
The Parallel Input/Output Controller (PIO) manages up to 32 fully programmable input/output lines. Each I/O line may be
dedicated as a general-purpose I/O or be assigned to a function of an embedded peripheral. This assures effective
optimization of the pins of a product.
Each I/O line is associated with a bit number in all of the 32-bit registers of the 32-bit wide User Interface.
Each I/O line of the PIO Controller features:
ï¬ An input change interrupt enabling level change detection on any I/O line.
ï¬ Additional Interrupt modes enabling rising edge, falling edge, low level or high level detection on any I/O line.
ï¬ A glitch filter providing rejection of glitches lower than one-half of PIO clock cycle.
ï¬ A debouncing filter providing rejection of unwanted pulses from key or push button operations.
ï¬ Multi-drive capability similar to an open drain I/O line.
ï¬ Control of the pull-up and pull-down of the I/O line.
ï¬ Input visibility and output control.
The PIO Controller also features a synchronous output providing up to 32 bits of data output in a single write operation.
23.2
Embedded Characteristics
ï¬ Up to 32 Programmable I/O Lines
ï¬ Fully Programmable through Set/Clear Registers
ï¬ Multiplexing of Four Peripheral Functions per I/O Line
ï¬ For each I/O Line (Whether Assigned to a Peripheral or Used as General Purpose I/O)
ï¬ Input Change Interrupt
ï¬ Programmable Glitch Filter
ï¬ Programmable Debouncing Filter
ï¬ Multi-drive Option Enables Driving in Open Drain
ï¬ Programmable Pull Up on Each I/O Line
ï¬ Pin Data Status Register, Supplies Visibility of the Level on the Pin at Any Time
ï¬ Additional Interrupt Modes on a Programmable Event: Rising Edge, Falling Edge, Low Level or High Level
ï¬ Lock of the Configuration by the Connected Peripheral
ï¬ Synchronous Output, Provides Set and Clear of Several I/O lines in a Single Write
ï¬ Write Protect Registers
ï¬ Programmable Schmitt Trigger Inputs
ï¬ Programmable I/O Delay
ï¬ Programmable I/O Drive
SAM9G15 [DATASHEET]
11152FâATARMâ10-Mar-2014
212
|
▷ |