SAM9G15_14 Datasheet, PDF (762/1215 Pages) ATMEL Corporation – ARM-based Embedded MPU

38.8.6.2 10-bit Slave Addressing
For a slave address higher than 7 bits, the user must configure the address size (IADRSZ) and set the other slave
address bits in the internal address register (TWI_IADR). The two remaining Internal address bytes, IADR[15:8] and
IADR[23:16] can be used the same as in 7-bit Slave Addressing.
Example: Address a 10-bit device (10-bit device address is b1 b2 b3 b4 b5 b6 b7 b8 b9 b10)
1. Program IADRSZ = 1,
2. Program DADR with 1 1 1 1 0 b1 b2 (b1 is the MSB of the 10-bit address, b2, etc.)
3. Program TWI_IADR with b3 b4 b5 b6 b7 b8 b9 b10 (b10 is the LSB of the 10-bit address)
Figure 38-14 below shows a byte write to an Atmel AT24LC512 EEPROM. This demonstrates the use of internal
addresses to access the device.
Figure 38-14. Internal Address Usage
S
W
T
R
S
A
R
Device
I
T
FIRST
SECOND
T
O
T ^Address E ^{WORD ADDRESS WORD ADDRESS}
DATA
P
0
M
LRA M
A
LA
A
S
S/ C S
C
SC
C
B
BW K B
K
BK
K
38.8.7 Using the DMA Controller
The use of the DMA significantly reduces the CPU load.
To assure correct implementation, respect the following programming sequence.
38.8.7.1 Data Transmit with the DMA
1. Initialize the DMA (channels, memory pointers, size, etc.);
2. Configure the master mode (DADR, CKDIV, etc.).
3. Enable the DMA.
4. Wait for the DMA BTC flag.
5. Disable the DMA.
38.8.7.2 Data Receive with the DMA
The PDC transfer size must be defined with the buffer size minus 2. The two remaining characters must be managed
without PDC to ensure that the exact number of bytes are received whatever the system bus latency conditions
encountered during the end of buffer transfer period.
1. Initialize the DMA (channels, memory pointers, size -2, etc.);
2. Configure the master mode (DADR, CKDIV, etc.).
3. Enable the DMA.
4. Wait for the DMA BTC flag.
5. Disable the DMA.
6. Wait for the RXRDY flag in the TWI_SR register
7. Set the STOP command in TWI_CR
8. Read the penultimate character in TWI_RHR
9. Wait for the RXRDY flag in the TWI_SR register
10. Read the last character in TWI_RHR
SAM9G15 [DATASHEET]
11152F–ATARM–10-Mar-2014
762