SAM9263_14 Datasheet, PDF (720/1024 Pages) ATMEL Corporation – AT91SAM ARM-based Embedded MPU

The following flowchart shows how to manage a multiple write block transfer with the PDC (see Figure 40-12). Polling or
interrupt method can be used to wait for the end of write according to the contents of the Interrupt Mask Register
(MCI_IMR).
Figure 40-12. Multiple Write Functional Flow Diagram
Send SELECT/DESELECT_CARD
command(1) to select the card
Send SET_BLOCKLEN command(1)
Set the PDCMODE bit
MCI_MR = PDCMODE
Set the block length (in bytes)
MCI_MR = (BlockLength << 16)(2)
Set the block count (if necessary)
MCI_BLKR = (BlockCount << 0)
Configure the PDC channel
MCI_TPR = Data Buffer Address to write
MCI_TCR = BlockLength/4
Send WRITE_MULTIPLE_BLOCK
command(1)
MCI_PTCR = TXTEN
Read status register MCI_SR
Poll the bit
Yes
BLKE = 0
No
Send STOP_TRANSMISSION
command(1)
Poll the bit
Yes
NOTBUSY = 0
No
RETURN
Notes: 1. It is assumed that this command has been correctly sent (see Figure 40-9).
2. This field is also accessible in the MCI Block Register (MCI_BLKR).
SAM9263 [DATASHEET]
6249L–ATARM–28-Jun-13
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