SAM9263_14 Datasheet, PDF (403/1024 Pages) ATMEL Corporation – AT91SAM ARM-based Embedded MPU

31. Parallel Input/Output Controller (PIO)
31.1
Overview
The Parallel Input/Output Controller (PIO) manages up to 32 fully programmable input/output lines. Each I/O line may be
dedicated as a general-purpose I/O or be assigned to a function of an embedded peripheral. This assures effective
optimization of the pins of a product.
Each I/O line is associated with a bit number in all of the 32-bit registers of the 32-bit wide User Interface.
Each I/O line of the PIO Controller features:
z An input change interrupt enabling level change detection on any I/O line.
z A glitch filter providing rejection of pulses lower than one-half of clock cycle.
z Multi-drive capability similar to an open drain I/O line.
z Control of the pull-up of the I/O line.
z Input visibility and output control.
The PIO Controller also features a synchronous output providing up to 32 bits of data output in a single write operation.
31.2 Block Diagram
Figure 31-1. Block Diagram
AIC
PIO Interrupt
PIO Controller
PMC
PIO Clock
Data, Enable
Embedded
Peripheral
Data, Enable
Up to 32
peripheral IOs
Embedded
Peripheral
Up to 32
peripheral IOs
APB
PIN 0
PIN 1
Up to 32 pins
PIN 31
SAM9263 [DATASHEET]
6249L–ATARM–28-Jun-13
403