SAM9263_14 Datasheet, PDF (1001/1024 Pages) ATMEL Corporation – AT91SAM ARM-based Embedded MPU

5. Host controller raises the request for the first write transaction. By the time the transaction is completed, a frame
boundary is crossed.
6. After completing the first write transaction, the Host controller skips the second write transaction.
Consequence: When this error occurs, the Host controller tries the same IN token again.
Problem Fix/Workaround
This problem can be avoided if the system guarantees that the status update can be completed within the same frame.
50.1.20.2 ISO OUT Transfers
Conditions:
Consider the following scenario:
1. The Host controller sends an ISO OUT token after fetching 16 bytes of data from the system memory.
2. When the Host controller is sending the ISO OUT data, because of system latencies, remaining bytes of the
packet are not available. This results in a buffer underrun condition.
3. While there is an underrun condition, if the Host controller is in the process of bit-stuffing, it causes the Host con-
troller to hang.
Consequence: After the failure condition, the Host controller stops sending the SOF. This causes the connected device
to go into suspend state.
Problem Fix/Workaround
This problem can be avoided if the system can guarantee that no buffer underrun occurs during the transfer.
50.1.20.3 Remote Wakeup Event
Conditions:
When a Remote Wakeup event occurs on a downstream port, the OHCI Host controller begins to send resume signaling
to the device. The Host controller should send this resume signaling for 20 ms. However, if the driver sets the
HcControl.HCFS into USBOPERATIONAL state during the resume event, then the Host controller terminates sending
the resume signal with an EOP to the device.
Consequence: If the Device does not recognize the resume (<20 ms) event then the Device, it will remain in the suspend
state.
Problem Fix/Workaround
Host stack can do a port resume after it sets the HcControl.HCFS to USBOPERATIONAL.
50.1.21 USART
50.1.21.1 RXBRK Flag Error in Asynchronous Mode
When timeguard is 0, RXBRK is not set when the break character is located just after the Stop Bit. FRAME (Frame Error)
is set instead.
Problem Fix/Workaround
Timeguard should be > 0.
SAM9263 [DATASHEET] 1001
6249L–ATARM–28-Jun-13