C511_1 Datasheet, PDF (32/128 Pages) Siemens Semiconductor Group – 8-Bit CMOS Microcontroller

System Reset
5 System Reset
5.1 Hardware Reset
The hardware reset function built in the SAB-C511/513 microcontrollers allows for an easy
automatic start-up at a minimum of additional hardware and forces the controller to a predefined
default state. The hardware reset function can also be used during normal operation in order to
restart the device. This is particularly done when the power-down mode is to be terminated (see
power-down description chapter 8).
The reset input is an active high input. An internal Schmitt trigger is used at the input for noise
rejection. Since the reset is synchronized internally, the RESET pin must be held high for at least
two machine cycles (12 oscillator periods) while the oscillator is running. With the oscillator running
the internal reset is executed during the second machine cycle and is repeated every cycle until
RESET goes low again.
During RESET active, the pins ALE and PSEN are configured as inputs and should not be active
driven externally. An external stimulation at these lines during reset activates several test modes
which are reserved for test purposes. This in turn may cause unpredictable output operations at
several port pins.
At the RESET pin a pulldown resistor is internally connected to V_SS to allow a power-up reset
operation with an external capacitor only. An automatic reset can be obtained when power supply
is applied by connecting the reset pin via an external capacitor to V_CC. After the power supply has
been turned on, the capacitor must hold the voltage level at the reset pin for a specified time to effect
a complete reset.
A correct reset leaves the processor in a defined state. The program execution starts at location
0000H. After reset is internally accomplished the port latches of ports 0, 1, 2 and 3 default in FFH.
This leaves port 0 floating, since it is an open drain port when not used as data/address bus. All
other I/O port lines (ports 1, 2 and 3) output a one (1).
The contents of the internal RAM (conventional and XRAM) of the SAB-C511/513 is not affected by
a reset. After power-up the contents is undefined, while it remains unchanged during a reset if the
power supply is not turned off.
Note:
For the SAB-C513A-H (EEPROM version) the RESET signal has to be activated for at least 10 ms
if power is applied to the device. The reason for this is that the reference voltage generator of the
EEPROM device needs some time to come up from power-down state. In the power-on behaviour
there are no differences between the EEPROM and ROM versions.
This reset behaviour of the EEPROM version has to be taken into account for systems that also will
uses ROM versions of the SAB-C511/513 family and that use its software power down features.
Semiconductor Group
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