AT17LV256 Datasheet, PDF (17/24 Pages) ATMEL Corporation – FPGA Configuration EEPROM Memory

Packaging Information
8CN4 – LAP
AT17LV65/128/256/512/010/002/040
Marked Pin1 Indentifier
E
0.10 mm
TYP
e
D
Top View
L1
8
1
7
2
6
3
5
4
e1
L
Bottom View
Note: 1. Metal Pad Dimensions.
A
A1
Side View
Pin1 Corner
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL MIN NOM MAX NOTE
A
0.94
1.04
1.14
A1
0.30
0.34 0.38
b
b
0.45
0.50
0.55
1
D
5.89
5.99
6.09
E
4.89
5.99
6.09
e
1.27 BSC
e1
1.10 REF
L
0.95
1.00
1.05
1
L1
1.25
1.30
1.35
1
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TITLE
8CN4, 8-lead (6 x 6 x 1.04 mm Body), Lead Pitch 1.27 mm,
Leadless Array Package (LAP)
11/14/01
DRAWING NO. REV.
8CN4
A
17
2321E–CNFG–06/03