AT17LV256 Datasheet, PDF (15/24 Pages) ATMEL Corporation – FPGA Configuration EEPROM Memory

Figure 1. Ordering Code
AT17LV65/128/256/512/010/002/040
AT17LV65A-10PC
Voltage
3.0V to 5.5V
Size (Bits)
65 = 65K
128 = 128K
256 = 256K
512 = 512K
010 = 1M
002 = 2M
040 = 4M
Special Pinouts
A = Altera
Blank = Xilinx /Atmel/
Other
Package Temperature
C = 8CN4 C = Commercial
P = 8P3 I = Industrial
N = 8S1
J = 20J
S = 20S2
TQ = 44A
BJ = 44J
8CN4
8P3
8S1
20J
20S2
44A
44J
Package Type
8-lead, 6 mm x 6 mm x 1 mm, Leadless Array Package (LAP) – Pin-compatible with 8-lead SOIC/VOID Packages
8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8-lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
20-lead, Plastic J-leaded Chip Carrier (PLCC)
20-lead, 0.300" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
44-lead, Thin (1.0 mm) Plastic Quad Flat Package Carrier (TQFP)
44-lead, Plastic J-leaded Chip Carrier (PLCC)
15
2321E–CNFG–06/03