SAMA5D44_14 Datasheet, PDF (1302/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

43.6.1 UART Control Register
Name:
UART_CR
Address: 0xF8004000 (0), 0xFC004000 (1)
Access:
Write-only
31
30
29
28
–
–
–
–
23
22
21
20
–
–
–
–
15
14
13
12
–
–
–
–
7
TXDIS
6
TXEN
5
RXDIS
4
RXEN
27
–
19
–
11
–
3
RSTTX
26
–
18
–
10
–
2
RSTRX
25
24
–
–
17
16
–
–
9
8
–
RSTSTA
1
0
–
–
• RSTRX: Reset Receiver
0: No effect.
1: The receiver logic is reset and disabled. If a character is being received, the reception is aborted.
• RSTTX: Reset Transmitter
0: No effect.
1: The transmitter logic is reset and disabled. If a character is being transmitted, the transmission is aborted.
• RXEN: Receiver Enable
0: No effect.
1: The receiver is enabled if RXDIS is 0.
• RXDIS: Receiver Disable
0: No effect.
1: The receiver is disabled. If a character is being processed and RSTRX is not set, the character is completed before the
receiver is stopped.
• TXEN: Transmitter Enable
0: No effect.
1: The transmitter is enabled if TXDIS is 0.
• TXDIS: Transmitter Disable
0: No effect.
1: The transmitter is disabled. If a character is being processed and a character has been written in the UART_THR and
RSTTX is not set, both characters are completed before the transmitter is stopped.
• RSTSTA: Reset Status
0: No effect.
1: Resets the status bits PARE, FRAME and OVRE in the UART_SR.
1302
SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14