SAMA5D44_14 Datasheet, PDF (1099/1776 Pages) ATMEL Corporation – Atmel | SMART ARM-based Embedded MPU

37.7.95 PTP Peer Event Frame Received Nanoseconds Register
Name:
GMAC_PEFRN
Address: 0xF80201FC (0), 0xFC0281FC (1)
Access:
Read-only
31
30
29
28
27
26
25
24
–
–
RUD
23
22
21
20
19
18
17
16
RUD
15
14
13
12
11
10
9
8
RUD
7
6
5
4
3
2
1
0
RUD
• RUD: Register Update
The register is updated with the value that the 1588 Timer Nanoseconds Register holds when the SFD of a PTP receive
primary event crosses the MII interface. An interrupt is issued when the register is updated.
SAMA5D4 Series [DATASHEET]
Atmel-11238A-ATARM-SAMA5D4-Datasheet_30-Sep-14
1099