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AT17C002 Datasheet, PDF (11/19 Pages) ATMEL Corporation – FPGA Configuration EEPROM Memory
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AT17C/LV002
.
AC Characteristics for AT17C002
VCC = 5V ± 5% Commercial, VCC = 5V ± 10% Industrial/Military
Commercial
Industrial/Military(1)
Symbol Description
Min
Max
Min
Max
Units
TOE(2)
TCE(2)
TCAC(2)
OE to Data Delay
CE to Data Delay
CLK to Data Delay
30
35
ns
45
45
ns
50
50
ns
TOH
TDF(3)
Data Hold From CE, OE or CLK
CE or OE to Data Float Delay
0
0
ns
50
50
ns
TLC
CLK Low Time
20
20
ns
THC
CLK High Time
20
20
ns
TSCE
CE Setup Time to CLK (to guarantee proper counting)
20
25
ns
THCE
CE Hold Time from CLK (to guarantee proper counting)
0
0
ns
THOE
OE High Time (guarantees counter is reset)
20
20
ns
FMAX
Notes:
Maximum Input Clock Frequency
15
15
1. Preliminary specifications for military operating range only.
2. AC test load = 50 pF.
3. Float delays are measured with 5 pF AC loads. Transition is measured ± 200 mV from steady state active levels.
MHz
AC Characteristics for AT17C002 when Cascading
VCC = 5V ± 5% Commercial/VCC = 5V ± 10% Industrial/Military
Commercial
Industrial/Military(1)
Symbol Description
Min
Max
Min
Max
Units
TCDF (3)
CLK to Data Float Delay
50
50
TOCK(2)
TOCE(2)
CLK to CEO Delay
CE to CEO Delay
35
40
35
35
TOOE(2)
RESET/OE to CEO Delay
30
30
FMAX
Notes:
Maximum Input Clock Frequency
12.5
12.5
1. Preliminary specifications for military operating range only.
2. AC test load = 50 pF.
3. Float delays are measured with 5 pF AC loads. Transition is measured ± 200 mV from steady state active levels.
ns
ns
ns
ns
MHz
11
2281D–12/01
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