TMD4903 Datasheet, PDF (63/86 Pages) ams AG – Color and Proximity Sensor Module with mobeam

TMD4903 − Application Information
Figure 74:
Carrier Frequencies
Carrier frequency, Duty cycle, and Pause (the delay between
complete patterns) comprise the registers associated with
timing. Carrier periods are selectable in 250ns increments in
with register settings in the range of 8 to 255. Carrier
frequencies are in the range of 16 kHz to 460 kHz. Typical carrier
frequencies are listed in the table below. Protocols that do not
use carriers can also be accommodated by enabling the DC
Carrier Selection bit. The duty cycle of the carrier is selectable
as: 50%, 37%, 25%, and 12%. Note that these duty cycles do not
translate exactly to the actual LED duty cycle, depending on the
external circuit. Finally, if desired, complete pattern rebursts are
separated by a selectable delay of 0us to 2.55s, in 10us
increments.
Desired Frequency (kHz) Generated Frequency (kHz)
IBT
36
36.04
111
38
38.10
105
40
40.00
100
56
56.34
71
450
444.44
9
Carrier Frequencies: Typical carrier frequencies can be reproduced to closely match the desired value.
Controls associated with the output are:
Output select, Output Polarity Inversion, and LED Drive
Strength. Output Select is used to choose output on the
integrated LED or the GPIO pin. The polarity inversion control
inverts the waveform on both the LED and the GPIO pin if
enabled. The LED Drive Strength controls the current through
the integrated LED which effectively sets its intensity.
Controls associated with interrupts are:
Pattern Burst Interrupt Enable, Pattern Burst Interrupt flag,
Pattern Burst Interrupt Clear, Pattern Burst Interrupt Force, and
Pattern Burst Busy. Following an entire pattern burst, including
all repeats, loops, and delays, a pattern burst interrupt bit is set.
This bit is readable from two locations: STATUS register and
ISTATUS register. If the interrupt enable bit is set, then the INT
pin will also activate when the burst is finished. To clear the
interrupt, the host must write a zero to IRBeam Interrupt Clear
(0xDE<3>). For debugging purposes the interrupt bits and pin
can be forced to activate by setting the Pattern Burst Interrupt
Force bit. The Pattern Burst Busy bit is automatically set
whenever a pattern is actively being transmitted; it is reset once
the remote control engine returns to the IDLE state.
ams Datasheet
[v1-12] 2015-May-14
Page 63
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