X2P376 Datasheet, PDF (9/14 Pages) AMI SEMICONDUCTOR – 0.15mm Structured ASIC

XPressArray-II 0.15mm Structured ASIC
Figure 9 shows the general purpose PLL used in zero delay
mode. This mode supports integer multiply or divide for both
outputs. Locations A and B are phased matched.
Data Sheet
PAD
A
DFF
+N
Phase
Compare
Phase
Shift
C
+A
+B
PAD
B
+M
General Purpose PLL
Figure 9: General Purpose PLL in Zero Delay Mode
Figure 10 shows the general purpose PLL used in external
feedback mode. This mode supports integer multiply or divide
for both outputs. Locations A and B are phase matched.
PAD
A
+N
Phase
Compare
Phase
Shift
+M
C
+A
+B
DFF
PAD
General Purpose PLL
PAD B
Figure 10: General Purpose PLL in External Feedback Mode
Figure 11 shows the general purpose PLL used in clock tree
mode. This mode supports integer multiply or divide for both
outputs. Locations A and B are phase matched, C is phase
controlled with respect to D.
PAD
A
DFF
+N
Phase
Compare
Phase
Shift
D
+A
C
+B
+M
General Purpose PLL
Figure 11: General Purpose PLL in Clock Tree Mode
AMI Semiconductor - Preliminary
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