X2P376 Datasheet, PDF (2/14 Pages) AMI SEMICONDUCTOR – 0.15mm Structured ASIC

XPressArray-II 0.15mm Structured ASIC
Data Sheet
Comprehensive clock management circuitry features up to
eight all digital delay-locked loops (DLLs) and a maximum of
eight phase-locked loops (PLLs). High fault coverage is
provided through integrated scan-test, memory BIST and
JTAG support.
Package offerings include traditional plastic BGA and flip-chip
BGA in 1.00mm and 1.27mm pitches. Because XPressArray-
II devices consume significantly less power than equivalent
FPGAs, lower cost plastic packaging can be used in most
cases. Table 2 shows the supported package configurations.
Packaging options exist to optimize individual conversions.
Table 2: XPressArray-II Package Options
Pins
256 FBGA
456 FBGA
484 FBGA
575 PBGA
672 FBGA
672 PBGA
672 FFBGA
676 FBGA
724 PBGA
728 PBGA
780 FBGA
896 FFBGA
956 PBGA
957 BFBGA
1020 FBGA
1148 FFBGA
1152 FFBGA
1508 FBGA
1517 FFBGA
1696 FFBGA
1704 FFBGA
Description
256 Fine Pitch Ball Grid Array
456 Fine Pitch Ball Grid Array
484 Fine Pitch Ball Grid Array
575 Standard Ball Grid Array
672 Fine Pitch Ball Grid Array
672 Standard Ball Grid Array
672 Flip-Chip Fine Pitch Ball Grid Array
676 Fine Pitch Ball Grid Array
724 Standard Ball Grid Array
728 Standard Ball Grid Array
780 Fine Pitch Ball Grid Array
896 Flip-Chip Fine Pitch Ball Grid Array
956 Standard Ball Grid Array
957 Flip-Chip Standard Pitch Ball Grid Array
1020 Fine Pitch Ball Grid Array
1148 Flip-Chip Fine Pitch Ball Grid Array
1152 Flip-Chip Fine Pitch Ball Grid Array
1508 Fine Pitch Ball Grid Array
1517 Flip-Chip Fine Pitch Ball Grid Array
1696 Flip-Chip Fine Pitch Ball Grid Array
1704 Flip-Chip Fine Pitch Ball Grid Array
Pitch (mm)
1.0
1.0
1.0
1.27
1.0
1.27
1.0
1.0
1.27
1.27
1.0
1.0
1.27
1.27
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Size (mm)
17x17
23x23
23x23
31x31
27x27
35x35
27x27
27x27
35x35
35x35
29x29
31x31
40x40
40x40
33x33
35x35
35x35
40x40
40x40
42.5x42.5
42.5x42.5
Max I/Os
187
344
369
423
521
514
459
500
564
531
675
639
747
699
859
819
839
1267
1123
1179
1131
For FPGA conversions, rapid access to XPressArray-II
technology can be achieved via AMI Semiconductor's
NETRANS® conversion methodology. Alternatively, the
availability of XPressArray-II synthesis libraries for leading
commercial synthesizers allows conversion of FPGA designs
to an ASIC by simply re-targeting from an FPGA library to an
XPressArray-II library.
3.0 The Advantages of XPressArray-II
XPressArray-II technology is ideal for medium density ASIC
applications requiring high-performance and low power, with
1.5V/1.2V operation. XPressArray-II devices are fabricated
using a hybrid technology that integrates an established
0.15mm front-end process with a proven AMIS metal finishing
technology, which is used to produce a customized back-end.
The 0.15mm processing steps are common to multiple
applications, reducing costs by allowing existing tooling to be
utilized. At the same time, tooling and manufacturing costs are
significantly lower for the metal finishing process than for
traditional 0.15mm cell based processes. The result is that
XPressArray-II delivers reduced cycle times and significant
reductions in terms of both NRE and unit cost through
manufacturing utilizing structured ASIC technology.
The XPressArray-II architecture offers a unique solution to the
challenges of maintaining FPGA process compatibility while
delivering ASIC technology with reasonable NREs and low
piece price. Compared to equivalent FPGAs, XPressArray-II
devices operate at the same voltage, offer higher densities,
better performance and consume less power. Figure 1
compares volume pricing for FPGA, cell-based ASIC and
XPressArray-II devices. Figure 2 compares power
consumption of these devices.
AMI Semiconductor - Preliminary
www.amis.com
2