405GP Datasheet, PDF (27/59 Pages) Applied Micro Circuits Corporation – Power PC 405GP Embedded Processor

Revision 2.03 – September 7, 2007
Data Sheet
405GP – Power PC 405GP Embedded Processor
Signals Listed by Ball Assignment—413-Ball Package (Part 1 of 3)
Ball
Signal Name
Ball
Signal Name
Ball
Signal Name
Ball
A1
GND
B17
PCIAD0
D10
PerCS5[GPIO14]
G13
A2
PerAddr4
B18
PCIAD3
D11
OV_DD
G15
A3
PerAddr11
B19
Reserved
D12
V_DD
G16
A4
PerAddr15
B20
PCIReq2
D13
V_DD
G17
A5
PerAddr18
B21
PCIReq1
D14
GND
G20
A6
GND
B22
PCIAD11
D15
PCIReq0[Gnt]
G21
A7
PerAddr21
B23
PCIGnt2
D16
PCIC0[BE0]
G22
A8
DMAAck3
C1
PerPar3
D17
PCIClk
G23
A9
PerAddr25
C2
EOT0/TC0
D18
Reserved
H1
A10
PerAddr27
C3
PerAddr3
D19
PCIAD9
H2
A11
OV_DD
C4
PerAddr5
D20
PCIAD12
H3
A12
PerAddr28
C5
PerAddr8
D21
PCIAD15
H4
A13
V_DD
C6
DMAReq3
D22
PCIPErr
H7
A14
PerAddr29
C7
PerCS4[GPIO13]
D23
PCIGnt3
H8
A15
DMAAck2
C8
PerAddr16
E1
PerData24
H9
A16
DMAReq1
C9
PerAddr17
E2
Reserved
H10
A17
DMAAck0
C10
PerCS7[GPIO16]
E3
PerPar2
H11
A18
GND
C11
PerAddr2
E4
PerWBE3
H13
A19
PCIAD4
C12
PerAddr24
E20
TestEn
H14
A20
GPIO1[TS1E]
C13
DMAReq0
E21
PCIParity
H15
A21
GPIO3[TS1O]
C14
GND
E22
PCIIRDY
H16
A22
PCIAD10
C15
PCIAD5
E23
PCIC2[BE2]
H17
A23
GND
C16
Reserved
F1
GND
H20
B1
PerWBE2
C17
PCIAD6
F2
PerData23
H21
B2
PerWBE1
C18
PCIAD7
F3
PerData29
H22
B3
PerAddr6
C19
GPIO2[TS2E]
F4
PerPar1
H23
B4
PerAddr9
C20
PCIAD8
F20
PCIReq4
J1
B5
PerAddr14
C21
PHYTxClk
F21
PCITRDY
J2
B6
PerCS6[GPIO15]
C22
PCIC1[BE1]
F22
EMCTxD0
J3
B7
PerAddr19
C23
PCIStop
F23
GND
J4
B8
PerAddr20
D1
PerData27
G1
PerData19
J7
B9
DMAReq2
D2
PerData30
G2
PerData20
J8
B10
PerAddr22
D3
PerBLast
G3
PerData26
J9
B11
PerAddr23
D4
PerWBE0
G4
EOT1/TC1
J10
B12
PerAddr26
D5
PerCS3[GPIO12]
G7
PerAddr0
J11
B13
PerAddr30
D6
PerAddr7
G8
PerCS2[GPIO11]
J12
B14
DMAAck1
D7
PerAddr10
G10
OV_DD
J13
B15
PCIAD1
D8
PerAddr12
G11
PerCS0
J14
B16
PCIAD2
D9
PerAddr13
G12
PerAddr31
J15
J16
OV_DD
L20
V_DD
N22
PCIAD24
T1
J17
OV_DD
L21
AV_DD
N23
GND
T2
J20
EMCMDClk
L22
PCIAD19
P1
PerData10
T3
J21
EMCTxEn
L23
OV_DD
P2
PerData5
T4
J22
EMCTxD2
M1
PerData11
P3
HoldPri
T7
AMCC
Signal Name
PCIINT[PerWE]
OV_DD
PCIReq3
DrvrInh2
PCISErr
PCIReq5
PCIAD16
PCIAD18
PerData16
PerData22
Reserved
PerData31
PerR/W
PerErr
OV_DD
OV_DD
PerCS1[GPIO10]
PCIAD13
OV_DD
OV_DD
SysClk
DrvrInh1
PCIDevSel
PCIFrame
PCIAD17
PCIGnt5
PerData13
PerData21
PerData25
PerData28
OV_DD
OV_DD
PerClk
OV_DD
GND
PerAddr1
GND
OV_DD
SysReset
BusReq
PerData3
MemData31
MemData27
GPIO9[TrcClk]
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